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cf71963778
Add initial support for Renesas R-Car X5H R8A78000 Ironhide board. This consists mainly of DTs, Makefile and Kconfig entries and board specific configuration files. The DTs will be gradually switched over to Linux DTs via OF_UPSTREAM once Linux DTs become available upstream, as upstreaming progresses. Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
76 lines
1.4 KiB
C
76 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2025 Renesas Electronics Corp.
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*/
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#include <asm/arch/renesas.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/mach-types.h>
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#include <asm/processor.h>
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#include <asm/system.h>
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#include <linux/errno.h>
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DECLARE_GLOBAL_DATA_PTR;
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static void init_generic_timer(void)
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{
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const u32 freq = CONFIG_SYS_CLK_FREQ;
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/* Update memory mapped and register based freqency */
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asm volatile ("msr cntfrq_el0, %0" :: "r" (freq));
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writel(freq, CNTFID0);
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/* Enable counter */
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setbits_le32(CNTCR_BASE, CNTCR_EN);
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}
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static void init_gic_v3(void)
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{
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/* GIC v3 power on */
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writel(BIT(1), GICR_LPI_PWRR);
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/* Wait till the WAKER_CA_BIT changes to 0 */
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clrbits_le32(GICR_LPI_WAKER, BIT(1));
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while (readl(GICR_LPI_WAKER) & BIT(2))
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;
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writel(0xffffffff, GICR_SGI_BASE + GICR_IGROUPR0);
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}
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void s_init(void)
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{
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if (current_el() == 3)
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init_generic_timer();
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}
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int board_early_init_f(void)
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{
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return 0;
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}
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int board_init(void)
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{
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/* Allow WDT reset */
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writel(RST_KCPROT_DIS, RST_RESKCPROT0);
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clrbits_le32(RST_WDTRSTCR, RST_WWDT_RSTMSK | RST_RWDT_RSTMSK);
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if (current_el() != 3)
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return 0;
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init_gic_v3();
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return 0;
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}
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void __weak reset_cpu(void)
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{
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writel(RST_KCPROT_DIS, RST_RESKCPROT0);
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writel(0x1, RST_SWSRES1A);
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}
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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return 0;
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}
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