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- MIPS: mscc: added support for Jaguar2 platform - MIPS: optimised SPL linker script - MIPS: bcm6368: fix restart flow issues - MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards - MIPS: mt7688: small fixes and enhancements - mmc: compile-out write support if disabled -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiQkHUH+J02LLC9InKPlOlyTyXBgFAlw/LR0ACgkQKPlOlyTy XBg46xAAv3/7/aZuBhTYLmPuApcjJ/STGwHKtJTZUQtij6pxqbYDQB2AVzmjEbwk JR9KfXgvqcJK/XU3qVmrIs4kiHIKpC+y2diBgiCY26UVRFrmeKxP6T/AqLH6wCCG PEv0cE3U+XX2RX8VN0cItdhOuwnkbg09ToxAqfBrfPDTvI4xEO1EB28IVYozD16B ucBdUFkG4hB5JFqc+Sx8pJ2iSq4SmOp+mHD4sHM2XpbuMB4UnRNkjzQPk7gLHZUo i8wQ6tJoDKY07u9//QE75BkND/5dm1PflCNIrvH1/aJlv32lbHHf8Mm/ZEKCcth0 dFAhalFnhl8TF8l8MgmDmjtlE52u9GUVGBJpRfc7EX1EzLm2dVu62dxBl9r4qyXM jj5BZBoXFeaeuA3Zm8Oui+jbkKExiuJOAgbvb5vMzyaQYN0mQjFyMBCOQQzBqBoe sRh/itYb0Ie0F0B2Y96mx1UgTQ4LGWtBaWrnuCQhrIB9iwt1vHA6DWNfA5PMelDK 6iHLVBKYsV6sU+f7Ua9krczwP1p6y9u5XzW9teM7BLO5ab2vsI5/wz78OutAKmul NylqF3vtZDSGKz/duvEE54e4ltux0/xv5CFV/xO/bEiScNxGu8OPVIvtaAmgRomG vE7m63ZoI5DaxOpuBX4Qh8xOomshu3fM+1LnZ6sjulMXpoAE1vc= =Mxqj -----END PGP SIGNATURE----- Merge tag 'mips-pull-2019-11-16' of git://git.denx.de/u-boot-mips - MIPS: mscc: various enhancements for Luton and Ocelot platforms - MIPS: mscc: added support for Jaguar2 platform - MIPS: optimised SPL linker script - MIPS: bcm6368: fix restart flow issues - MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards - MIPS: mt7688: small fixes and enhancements - mmc: compile-out write support if disabled
# SPDX-License-Identifier: GPL-2.0+ # # Xilinx ZYNQ U-Boot # # (C) Copyright 2013 Xilinx, Inc. 1. About this This document describes the information about Xilinx Zynq U-Boot - like supported boards, ML status and TODO list. 2. Zynq boards Xilinx Zynq-7000 All Programmable SoCs enable extensive system level differentiation, integration, and flexibility through hardware, software, and I/O programmability. * zc702 (single qspi, gem0, mmc) [1] * zc706 (dual parallel qspi, gem0, mmc) [2] * zed (single qspi, gem0, mmc) [3] * microzed (single qspi, gem0, mmc) [4] * zc770 - zc770-xm010 (single qspi, gem0, mmc) - zc770-xm011 (8 or 16 bit nand) - zc770-xm012 (nor) - zc770-xm013 (dual parallel qspi, gem1) 3. Building ex. configure and build for zc702 board $ make zynq_zc702_config $ make 4. Bootmode Zynq has a facility to read the bootmode from the slcr bootmode register once user is setting through jumpers on the board - see page no:1546 on [5] All possible bootmode values are defined in Table 6-2:Boot_Mode MIO Pins on [5]. board_late_init() will read the bootmode values using slcr bootmode register at runtime and assign the modeboot variable to specific bootmode string which is intern used in autoboot. SLCR bootmode register Bit[3:0] values #define ZYNQ_BM_NOR 0x02 #define ZYNQ_BM_SD 0x05 #define ZYNQ_BM_JTAG 0x0 "modeboot" variable can assign any of "norboot", "sdboot" or "jtagboot" bootmode strings at runtime. 5. Mainline status - Added basic board configurations support. - Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq - Added zynq boards named - zc70x, zed, microzed, zc770_xm010/xm011/xm012/xm013 - Added zynq drivers: serial - drivers/serial/serial_zynq.c net - drivers/net/zynq_gem.c mmc - drivers/mmc/zynq_sdhci.c spi - drivers/spi/zynq_spi.c qspi - drivers/spi/zynq_qspi.c i2c - drivers/i2c/zynq_i2c.c nand - drivers/mtd/nand/raw/zynq_nand.c - Done proper cleanups on board configurations - Added basic FDT support for zynq boards - d-cache support for zynq_gem.c 6. TODO - Add FDT support on individual drivers [1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm [2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm [3] http://zedboard.org/product/zedboard [4] http://zedboard.org/product/microzed [5] http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf -- Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Sun Dec 15 14:52:41 IST 2013