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u-boot/arch/riscv/dts
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Zong Li e52b83ab13 board: sifive: drop stuff related to unmatched revision 1 
This patch reverts the following commits:
 - 4b4159d0f3 ("riscv: dts: add dts for unmatched rev1")
 - ffe9a394df ("board: sifive: support spl multi-dtb on unmatched board")

We won't plan to support unmatched that the revision below 3 in u-boot,
so they can be dropped because they might be useless.

Changed in v2:
 - rebase codebase to the latest master branch

Signed-off-by: Zong Li <zong.li@sifive.com>
Suggested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-07-21 16:39:57 +08:00
..
ae350_32.dts
riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config
2021-06-17 09:39:08 +08:00
ae350_64.dts
riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config
2021-06-17 09:39:08 +08:00
ae350-u-boot.dtsi
riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config
2021-06-17 09:39:08 +08:00
binman.dtsi
riscv: qemu: Switch to use binman to generate u-boot.itb
2021-05-19 17:01:51 +08:00
fu540-c000-u-boot.dtsi
riscv: fu540: dts: Correct reg size of clint node
2020-10-26 10:01:37 +08:00
fu540-c000.dtsi
riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux
2020-06-04 09:44:09 +08:00
fu540-hifive-unleashed-a00-ddr.dtsi
sifive: dts: fu540: Add DDR controller and phy register settings
2020-06-04 09:44:08 +08:00
fu740-c000-u-boot.dtsi
riscv: sifive: fu740: Support i2c in spl
2021-07-06 20:24:25 +08:00
fu740-c000.dtsi
riscv: dts: add fu740 support
2021-05-31 16:35:54 +08:00
fu740-hifive-unmatched-a00-ddr.dtsi
riscv: dts: add SiFive Unmatched board support
2021-05-31 16:35:54 +08:00
hifive-unleashed-a00-u-boot.dtsi
riscv: sifive: unleashed: Switch to use binman to generate u-boot.itb
2021-05-19 17:01:50 +08:00
hifive-unleashed-a00.dts
riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux
2020-06-04 09:44:09 +08:00
hifive-unmatched-a00-u-boot.dtsi
riscv: dts: add SiFive Unmatched board support
2021-05-31 16:35:54 +08:00
hifive-unmatched-a00.dts
riscv: dts: add SiFive Unmatched board support
2021-05-31 16:35:54 +08:00
k210-maix-bit.dts
riscv: k210: Enable QSPI for spi3
2021-02-25 18:06:08 +08:00
k210.dtsi
k210: dts: Set PLL1 to the same rate as PLL0
2021-06-17 09:40:58 +08:00
Makefile
board: sifive: drop stuff related to unmatched revision 1
2021-07-21 16:39:57 +08:00
microchip-mpfs-icicle-kit-u-boot.dtsi
riscv: dts: Add device tree for Microchip Icicle Kit
2021-01-18 11:06:38 +08:00
microchip-mpfs-icicle-kit.dts
riscv: dts: mpfs-icicle-kit: Drop 'clock-frequency' in the uart nodes
2021-04-08 15:37:30 +08:00
openpiton-riscv64.dts
riscv: dts: add OpenPiton RISC-V board dts support
2021-07-07 20:34:02 +08:00
qemu-virt.dts
riscv: qemu: Switch to use binman to generate u-boot.itb
2021-05-19 17:01:51 +08:00