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			88 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			88 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * (C) Copyright 2002
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 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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 *
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 * See file CREDITS for list of people who contributed to this
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 * project.
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License as
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 * published by the Free Software Foundation; either version 2 of
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 * the License, or (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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 * MA 02111-1307 USA
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 */
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#include <config.h>
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#include <common.h>
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#include <asm/io.h>
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#include "pci.h"
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#include "hardware.h"
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#include "pcippc2.h"
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u32		pcippc2_fpga0_phys;
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u32		pcippc2_fpga1_phys;
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void pcippc2_fpga_init (void)
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{
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  pci_dev_t		bdf = pci_find_device(FPGA_VENDOR_ID, FPGA_DEVICE_ID, 0);
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  unsigned int		addr;
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  u16			cmd;
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  if (bdf == -1)
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  {
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    puts("Unable to find FPGA !\n");
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    hang();
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  }
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  pci_read_config_word(bdf, PCI_COMMAND, &cmd);
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  if ((cmd & (PCI_COMMAND_MEMORY | PCI_COMMAND_IO)) != (PCI_COMMAND_MEMORY | PCI_COMMAND_IO))
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  {
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    puts("FPGA is not configured !\n");
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    hang();
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  }
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  pci_read_config_dword(bdf, PCI_BASE_ADDRESS_0, &addr);
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  if (addr & 0x1)
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  {
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      /* IO space
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       */
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    pcippc2_fpga0_phys = pci_io_to_phys(bdf, addr & 0xfffffffc);
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  }
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  else
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  {
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      /* Memory space
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       */
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    pcippc2_fpga0_phys = pci_mem_to_phys(bdf, addr & 0xfffffff0);
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  }
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  pci_read_config_dword(bdf, PCI_BASE_ADDRESS_1, &addr);
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  if (addr & 0x1)
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  {
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      /* IO space
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       */
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    pcippc2_fpga1_phys = pci_io_to_phys(bdf, addr & 0xfffffffc);
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  }
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  else
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  {
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      /* Memory space
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       */
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    pcippc2_fpga1_phys = pci_mem_to_phys(bdf, addr & 0xfffffff0);
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  }
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    /* Interrupts are not used
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     */
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  out32(FPGA(INT, INTR_MASK), 0xffffffff);
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  iobarrier_rw();
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}
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