Simon Glass cd3c67692b tegra: clock: Adjust PLL access to avoid a warning
A harmless but confusing warning is displayed when looking up the
DisplayPort PLL. Correct this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-06-09 09:56:14 -07:00
..
2015-05-18 12:06:36 +03:00