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	The 'xtfpga' board is actually a set of FPGA evaluation boards that can be configured to run an Xtensa processor. - Avnet Xilinx LX60 - Avnet Xilinx LX110 - Avnet Xilinx LX200 - Xilinx ML605 - Xilinx KC705 These boards share the same components (open-ethernet, ns16550 serial, lcd display, flash, etc.). Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
		
			
				
	
	
		
			38 lines
		
	
	
		
			727 B
		
	
	
	
		
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			38 lines
		
	
	
		
			727 B
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Cadence Tensilica xtfpga system reset driver.
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|  *
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|  * (C) Copyright 2016 Cadence Design Systems Inc.
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|  *
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|  * SPDX-License-Identifier:     GPL-2.0+
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|  */
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| 
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| #include <common.h>
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| #include <dm.h>
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| #include <errno.h>
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| #include <sysreset.h>
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| #include <asm/io.h>
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| 
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| static int xtfpga_reset_request(struct udevice *dev, enum sysreset_t type)
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| {
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| 	switch (type) {
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| 	case SYSRESET_COLD:
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| 		writel(CONFIG_SYS_FPGAREG_RESET_CODE,
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| 		       CONFIG_SYS_FPGAREG_RESET);
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| 		break;
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| 	default:
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| 		return -EPROTONOSUPPORT;
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| 	}
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| 
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| 	return -EINPROGRESS;
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| }
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| 
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| static struct sysreset_ops xtfpga_sysreset_ops = {
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| 	.request	= xtfpga_reset_request,
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| };
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| 
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| U_BOOT_DRIVER(xtfpga_sysreset) = {
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| 	.name	= "xtfpga_sysreset",
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| 	.id	= UCLASS_SYSRESET,
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| 	.ops	= &xtfpga_sysreset_ops,
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| };
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