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88426bd6b0
Since mvpp2 is using the new mdio driver and the cp110 has been synced with the linux upstream, the mdio has to enabled in the device tree file. This is missing for some device tree files and therefore the network cards do not come online. Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de> Reviewed-by: Stefan Roese <sr@denx.de>
207 lines
3.2 KiB
Plaintext
207 lines
3.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016- 2021 Marvell International Ltd.
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*/
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/*
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* Device Tree file for Marvell Armada 7040 Development board platform
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* Boot device: SPI NOR, 0x32 (SW3)
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*/
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#include "armada-7040.dtsi"
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/ {
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model = "Marvell Armada 7040 DB board";
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compatible = "marvell,armada7040-db", "marvell,armada7040",
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"marvell,armada-ap806-quad", "marvell,armada-ap806";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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aliases {
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i2c0 = &cp0_i2c0;
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spi0 = &cp0_spi1;
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};
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memory@00000000 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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};
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&ap_pinctl {
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/* MPP Bus:
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* SDIO [0-5]
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* UART0 [11,19]
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*/
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/* 0 1 2 3 4 5 6 7 8 9 */
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pin-func = < 1 1 1 1 1 1 0 0 0 0
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0 3 0 0 0 0 0 0 0 3 >;
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};
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&uart0 {
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status = "okay";
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};
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&cp0_pcie2 {
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status = "okay";
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};
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&cp0_i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_i2c0_pins>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&cp0_pinctl {
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/* MPP Bus:
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* TDM [0-11]
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* SPI [13-16]
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* SATA1 [28]
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* UART0 [29-30]
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* SMI [32,34]
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* XSMI [35-36]
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* I2C [37-38]
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* RGMII1[44-55]
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* SD [56-62]
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*/
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/* 0 1 2 3 4 5 6 7 8 9 */
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pin-func = < 4 4 4 4 4 4 4 4 4 4
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4 4 0 3 3 3 3 0 0 0
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0 0 0 0 0 0 0 0 9 0xA
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0xA 0 7 0 7 7 7 2 2 0
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0 0 0 0 1 1 1 1 1 1
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1 1 1 1 1 1 0xE 0xE 0xE 0xE
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0xE 0xE 0xE >;
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};
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&cp0_spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_spi0_pins>;
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status = "okay";
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spi-flash@0 {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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spi-max-frequency = <20000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "U-Boot";
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reg = <0x0 0x200000>;
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};
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partition@400000 {
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label = "Filesystem";
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reg = <0x200000 0xe00000>;
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};
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};
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};
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};
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&cp0_sata0 {
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status = "okay";
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};
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&cp0_usb3_0 {
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status = "okay";
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};
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&cp0_usb3_1 {
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status = "okay";
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};
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&cp0_comphy {
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phy0 {
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phy-type = <COMPHY_TYPE_SGMII1>;
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phy-speed = <COMPHY_SPEED_1_25G>;
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};
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phy1 {
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phy-type = <COMPHY_TYPE_USB3_HOST0>;
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phy-speed = <COMPHY_SPEED_5G>;
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};
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phy2 {
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phy-type = <COMPHY_TYPE_SFI0>;
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phy-speed = <COMPHY_SPEED_10_3125G>;
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};
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phy3 {
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phy-type = <COMPHY_TYPE_SATA1>;
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phy-speed = <COMPHY_SPEED_5G>;
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};
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phy4 {
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phy-type = <COMPHY_TYPE_USB3_HOST1>;
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phy-speed = <COMPHY_SPEED_5G>;
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};
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phy5 {
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phy-type = <COMPHY_TYPE_PEX2>;
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phy-speed = <COMPHY_SPEED_5G>;
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};
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};
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&cp0_utmi0 {
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status = "okay";
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};
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&cp0_utmi1 {
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status = "okay";
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};
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&ap_sdhci0 {
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status = "okay";
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bus-width = <4>;
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no-1-8-v;
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non-removable;
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};
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&cp0_sdhci0 {
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status = "okay";
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bus-width = <4>;
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no-1-8-v;
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non-removable;
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};
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&cp0_mdio {
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status = "okay";
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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&cp0_ethernet {
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status = "okay";
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};
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&cp0_eth0 {
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status = "okay";
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phy-mode = "sfi"; /* lane-2 */
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};
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&cp0_eth1 {
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status = "okay";
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phy = <&phy0>;
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phy-mode = "sgmii";
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};
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&cp0_eth2 {
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status = "okay";
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phy = <&phy1>;
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phy-mode = "rgmii-id";
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};
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