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189ec2fee6
Device tree alignment with Linux kernel v5.18-rc2: - ARM: dts: stm32: Add support for the emtrion emSBC-Argon (only the pincontrol part) - ARM: dts: stm32: Drop duplicate status okay from DHCOM gpioc node - ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp151 - ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15 - ARM: dts: stm32: use exti 19 as main interrupt to support RTC wakeup on stm32mp157 - ARM: dts: stm32: add DMA configuration to UART nodes on stm32mp151 - ARM: dts: stm32: keep uart4 behavior on * - ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15 Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
50 lines
1.1 KiB
Plaintext
50 lines
1.1 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (c) STMicroelectronics 2019 - All Rights Reserved
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* Copyright (c) 2020 Engicam srl
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* Copyright (c) 2020 Amarula Solutons(India)
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*/
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/dts-v1/;
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#include "stm32mp157.dtsi"
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#include "stm32mp157a-icore-stm32mp1.dtsi"
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#include "stm32mp15-pinctrl.dtsi"
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#include "stm32mp15xxaa-pinctrl.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Engicam i.Core STM32MP1 C.TOUCH 2.0";
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compatible = "engicam,icore-stm32mp1-ctouch2",
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"engicam,icore-stm32mp1", "st,stm32mp157";
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aliases {
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serial0 = &uart4;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&sdmmc1 {
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bus-width = <4>;
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disable-wp;
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pinctrl-names = "default", "opendrain", "sleep";
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pinctrl-0 = <&sdmmc1_b4_pins_a>;
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pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
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pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
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st,neg-edge;
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vmmc-supply = <&v3v3>;
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status = "okay";
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};
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&uart4 {
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pinctrl-names = "default", "sleep", "idle";
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pinctrl-0 = <&uart4_pins_a>;
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pinctrl-1 = <&uart4_sleep_pins_a>;
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pinctrl-2 = <&uart4_idle_pins_a>;
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/delete-property/dmas;
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/delete-property/dma-names;
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status = "okay";
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};
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