Tingting Meng c42ce8d8bd ddr: altera: agilex5: LPDDRs in-line ECC support ... In-line ECC support was added for LPDDR by reserving the last one-eighth of the memory space for ECC data. Full memory initialization using the BIST MEM INIT mailbox command, based on address and size, is required to correctly generate ECC data and enable proper ECC logic verification. Signed-off-by: Tingting Meng <tingting.meng@altera.com>		2025-04-22 11:47:40 +08:00
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altera	ddr: altera: agilex5: LPDDRs in-line ECC support	2025-04-22 11:47:40 +08:00
fsl	drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD	2024-10-11 11:44:48 -06:00
imx	imx: Use per board ddrphy_trained_csr	2024-12-23 08:10:15 -03:00
marvell	drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD	2024-10-11 11:44:48 -06:00
microchip	Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"	2024-05-20 13:35:03 -06:00
Kconfig	Convert CONFIG_SPD_EEPROM to Kconfig	2022-12-05 16:08:37 -05:00