Sagar Shrikant Kadam
ef9f65f389
dt-bindings: prci: add indexes for reset signals available in prci ...
Add bit indexes for reset signals within the PRCI module
on FU540-C000 SoC.
The DDR and ethernet sub-system's have reset signals
indicated by these reset indexes.
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-08-04 09:19:41 +08:00
2020-04-24 16:40:09 -04:00
2020-04-24 16:40:09 -04:00
2018-05-07 09:34:12 -04:00
2018-05-07 09:34:12 -04:00
2020-04-06 09:56:35 +02:00
2020-04-06 09:56:35 +02:00
2020-04-06 09:56:35 +02:00
2019-05-31 09:57:49 +02:00
2020-04-06 09:56:35 +02:00
2018-05-07 09:34:12 -04:00
2018-11-26 14:40:52 +01:00
2018-05-07 09:34:12 -04:00
2018-05-07 09:34:12 -04:00
2018-05-07 09:34:12 -04:00
2018-05-07 09:34:12 -04:00
2018-05-07 09:34:12 -04:00
2018-05-07 09:34:12 -04:00
2019-10-25 17:20:43 +02:00
2018-05-07 09:34:12 -04:00
2018-05-07 09:34:12 -04:00
2019-04-23 11:19:09 +02:00
2019-10-08 16:36:36 +02:00
2019-10-08 16:36:36 +02:00
2020-07-01 15:01:22 +08:00
2019-10-11 10:10:18 -04:00
2019-10-25 17:20:44 +02:00
2019-10-11 10:10:18 -04:00
2020-07-10 11:49:28 +02:00
2020-08-04 09:19:41 +08:00
2019-11-01 16:45:40 +03:00
2018-07-20 15:55:05 -04:00
2018-09-28 22:09:24 +05:30
2018-09-28 22:09:24 +05:30
2018-09-28 22:09:24 +05:30
2018-08-13 13:07:35 +05:30
2018-07-16 12:02:54 +05:30
2020-01-24 23:06:49 +05:30
2018-05-07 11:31:43 +05:30
2018-07-16 12:01:58 +05:30
2019-01-18 22:19:09 +05:30
2019-01-18 22:19:09 +05:30
2019-01-18 22:19:09 +05:30
2018-07-31 11:38:13 +05:30
2018-07-31 11:38:13 +05:30
2018-05-07 09:34:12 -04:00
2019-10-24 13:37:02 +02:00
ef9f65f389