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6b24501438
Add PL bitstream dowload support for ZynqMP Bitstream will be validated by uboot and loaded to PL by invoking an smc instruction to ATF which route this request to PMU FW which will take care of loading it to PL Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
24 lines
684 B
Makefile
24 lines
684 B
Makefile
#
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# (C) Copyright 2008
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += fpga.o
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obj-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
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obj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
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obj-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
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obj-$(CONFIG_FPGA_ZYNQPL) += zynqpl.o
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obj-$(CONFIG_FPGA_ZYNQMPPL) += zynqmppl.o
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obj-$(CONFIG_FPGA_XILINX) += xilinx.o
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obj-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o
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ifdef CONFIG_FPGA_ALTERA
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obj-y += altera.o
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obj-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o
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obj-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
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obj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
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obj-$(CONFIG_FPGA_STRATIX_V) += stratixv.o
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obj-$(CONFIG_FPGA_SOCFPGA) += socfpga.o
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endif
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