mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2025-11-04 02:11:25 +01:00
f51cdaf191
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
83 lines
2.2 KiB
C
83 lines
2.2 KiB
C
/*
|
|
* Copyright 2009 Freescale Semiconductor, Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation; either version 2 of
|
|
* the License, or (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
*
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
* MA 02111-1307 USA
|
|
*
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <ns16550.h>
|
|
#include <asm/io.h>
|
|
#include <nand.h>
|
|
|
|
u32 sysclk_tbl[] = {
|
|
33333000, 39999600, 49999500, 66666000,
|
|
83332500, 99999000, 133332000, 166665000
|
|
};
|
|
|
|
void board_init_f(ulong bootflag)
|
|
{
|
|
int px_spd;
|
|
u32 plat_ratio, bus_clk, sys_clk;
|
|
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
|
|
|
|
#if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM)
|
|
/* for FPGA */
|
|
set_lbc_br(3, CONFIG_SYS_BR3_PRELIM);
|
|
set_lbc_or(3, CONFIG_SYS_OR3_PRELIM);
|
|
#else
|
|
#error CONFIG_SYS_BR3_PRELIM, CONFIG_SYS_OR3_PRELIM must be defined
|
|
#endif
|
|
|
|
/* initialize selected port with appropriate baud rate */
|
|
px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD));
|
|
sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK];
|
|
plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
|
|
bus_clk = sys_clk * plat_ratio / 2;
|
|
|
|
NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
|
|
bus_clk / 16 / CONFIG_BAUDRATE);
|
|
|
|
puts("\nNAND boot... ");
|
|
|
|
/* copy code to RAM and jump to it - this should not return */
|
|
/* NOTE - code has to be copied out of NAND buffer before
|
|
* other blocks can be read.
|
|
*/
|
|
relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0,
|
|
CONFIG_SYS_NAND_U_BOOT_RELOC);
|
|
}
|
|
|
|
void board_init_r(gd_t *gd, ulong dest_addr)
|
|
{
|
|
nand_boot();
|
|
}
|
|
|
|
void putc(char c)
|
|
{
|
|
if (c == '\n')
|
|
NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r');
|
|
|
|
NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c);
|
|
}
|
|
|
|
void puts(const char *str)
|
|
{
|
|
while (*str)
|
|
putc(*str++);
|
|
}
|