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c3dc39a2f8
It is bad practice to include common.h in other header files since it can bring in any number of superfluous definitions. It implies that some C files don't include it and thus may be missing CONFIG options that are set up by that file. The C files should include these themselves. Update some header files in arch/arm to drop this. Signed-off-by: Simon Glass <sjg@chromium.org>
112 lines
1.9 KiB
C
112 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd
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*/
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#ifndef _ASM_ARCH_GRF_RV1108_H
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#define _ASM_ARCH_GRF_RV1108_H
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struct rv1108_grf {
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u32 reserved[4];
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u32 gpio1a_iomux;
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u32 gpio1b_iomux;
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u32 gpio1c_iomux;
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u32 gpio1d_iomux;
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u32 gpio2a_iomux;
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u32 gpio2b_iomux;
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u32 gpio2c_iomux;
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u32 gpio2d_iomux;
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u32 gpio3a_iomux;
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u32 gpio3b_iomux;
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u32 gpio3c_iomux;
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u32 gpio3d_iomux;
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u32 reserved1[52];
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u32 gpio1a_pull;
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u32 gpio1b_pull;
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u32 gpio1c_pull;
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u32 gpio1d_pull;
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u32 gpio2a_pull;
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u32 gpio2b_pull;
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u32 gpio2c_pull;
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u32 gpio2d_pull;
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u32 gpio3a_pull;
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u32 gpio3b_pull;
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u32 gpio3c_pull;
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u32 gpio3d_pull;
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u32 reserved2[52];
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u32 gpio1a_drv;
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u32 gpio1b_drv;
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u32 gpio1c_drv;
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u32 gpio1d_drv;
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u32 gpio2a_drv;
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u32 gpio2b_drv;
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u32 gpio2c_drv;
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u32 gpio2d_drv;
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u32 gpio3a_drv;
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u32 gpio3b_drv;
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u32 gpio3c_drv;
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u32 gpio3d_drv;
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u32 reserved3[50];
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u32 gpio1l_sr;
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u32 gpio1h_sr;
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u32 gpio2l_sr;
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u32 gpio2h_sr;
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u32 gpio3l_sr;
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u32 gpio3h_sr;
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u32 reserved4[26];
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u32 gpio1l_smt;
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u32 gpio1h_smt;
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u32 gpio2l_smt;
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u32 gpio2h_smt;
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u32 gpio3l_smt;
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u32 gpio3h_smt;
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u32 reserved5[24];
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u32 soc_con0;
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u32 soc_con1;
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u32 soc_con2;
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u32 soc_con3;
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u32 soc_con4;
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u32 soc_con5;
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u32 soc_con6;
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u32 soc_con7;
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u32 soc_con8;
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u32 soc_con9;
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u32 soc_con10;
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u32 soc_con11;
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u32 reserved6[20];
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u32 soc_status0;
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u32 soc_status1;
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u32 reserved7[30];
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u32 cpu_con0;
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u32 cpu_con1;
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u32 reserved8[30];
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u32 os_reg0;
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u32 os_reg1;
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u32 os_reg2;
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u32 os_reg3;
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u32 reserved9[29];
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u32 ddr_status;
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u32 reserved10[30];
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u32 sig_det_con;
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u32 reserved11[3];
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u32 sig_det_status;
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u32 reserved12[3];
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u32 sig_det_clr;
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u32 reserved13[23];
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u32 host_con0;
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u32 host_con1;
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u32 reserved14[2];
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u32 dma_con0;
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u32 dma_con1;
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u32 reserved15[59];
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u32 uoc_status;
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u32 reserved16[2];
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u32 host_status;
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u32 reserved17[59];
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u32 gmac_con0;
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u32 reserved18[191];
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u32 chip_id;
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};
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check_member(rv1108_grf, chip_id, 0x0c00);
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#endif
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