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This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy module. DDR2 controller operates in half-rate mode (upto 533MHZ frequency). Signed-off-by: Paul Thacker <paul.thacker@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
7 lines
124 B
Makefile
7 lines
124 B
Makefile
#
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# Copyright (C) 2015 Microchip Technology Inc.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-$(CONFIG_MACH_PIC32) += ddr2.o
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