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014a953c4a
In order to factorize code between STM32F4 and STM32F7 migrate all structs related to RCC clocks in include/stm32_rcc.h Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
114 lines
2.4 KiB
C
114 lines
2.4 KiB
C
/*
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* Copyright (C) 2016, STMicroelectronics - All Rights Reserved
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* Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <stm32_rcc.h>
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#include <asm/io.h>
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#include <asm/arch/stm32.h>
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#include <asm/arch/stm32_defs.h>
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#include <asm/arch/gpt.h>
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#define READ_TIMER() (readl(&gpt1_regs_ptr->cnt) & GPT_FREE_RUNNING)
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#define GPT_RESOLUTION (CONFIG_SYS_HZ_CLOCK/CONFIG_STM32_HZ)
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DECLARE_GLOBAL_DATA_PTR;
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#define timestamp gd->arch.tbl
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#define lastdec gd->arch.lastinc
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int timer_init(void)
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{
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/* Timer2 clock configuration */
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clock_setup(TIMER2_CLOCK_CFG);
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/* Stop the timer */
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writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1);
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writel((CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ_CLOCK) - 1,
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&gpt1_regs_ptr->psc);
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/* Configure timer for auto-reload */
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writel(readl(&gpt1_regs_ptr->cr1) | GPT_MODE_AUTO_RELOAD,
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&gpt1_regs_ptr->cr1);
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/* load value for free running */
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writel(GPT_FREE_RUNNING, &gpt1_regs_ptr->arr);
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/* start timer */
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writel(readl(&gpt1_regs_ptr->cr1) | GPT_CR1_CEN, &gpt1_regs_ptr->cr1);
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writel(readl(&gpt1_regs_ptr->egr) | TIM_EGR_UG, &gpt1_regs_ptr->egr);
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/* Reset the timer */
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lastdec = READ_TIMER();
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timestamp = 0;
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return 0;
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}
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/*
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* timer without interrupts
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*/
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ulong get_timer(ulong base)
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{
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return (get_timer_masked() / GPT_RESOLUTION) - base;
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}
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void __udelay(unsigned long usec)
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{
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ulong tmo;
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ulong start = get_timer_masked();
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ulong tenudelcnt = CONFIG_SYS_HZ_CLOCK / (1000 * 100);
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ulong rndoff;
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rndoff = (usec % 10) ? 1 : 0;
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/* tenudelcnt timer tick gives 10 microsecconds delay */
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tmo = ((usec / 10) + rndoff) * tenudelcnt;
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while ((ulong) (get_timer_masked() - start) < tmo)
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;
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}
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ulong get_timer_masked(void)
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{
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ulong now = READ_TIMER();
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if (now >= lastdec) {
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/* normal mode */
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timestamp += now - lastdec;
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} else {
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/* we have an overflow ... */
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timestamp += now + GPT_FREE_RUNNING - lastdec;
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}
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lastdec = now;
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return timestamp;
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}
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void udelay_masked(unsigned long usec)
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{
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return udelay(usec);
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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*/
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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return CONFIG_STM32_HZ;
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}
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