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u-boot/drivers/ddr/marvell/a38x
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Baruch Siach d67b98ed47 ddr: marvell: a38x: allow board specific clock out setup 
DDR clock out might be unrelated to the number of active chip-select.
For example, the board might have two DDR components, but only one
chip-select. The clk_enable mask allows the board to enable DDR clocks
regardless of active chip-selects.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-01-21 08:31:49 +01:00
..
ddr3_debug.c
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
ddr3_init.c
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
ddr3_init.h
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
ddr3_logging_def.h
ARM: mvebu: a38x: sync ddr training code with upstream
2018-05-14 10:01:56 +02:00
ddr3_patterns_64bit.h
ARM: mvebu: a38x: sync ddr training code with upstream
2018-05-14 10:01:56 +02:00
ddr3_training_bist.c
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
ddr3_training_centralization.c
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
ddr3_training_db.c
mv_ddr: ddr3: fix tRAS timimg parameter
2019-03-19 09:22:05 +01:00
ddr3_training_hw_algo.c
mv_ddr: ddr3: only use active chip-selects when tuning ODT
2019-03-19 09:22:05 +01:00
ddr3_training_hw_algo.h
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
ddr3_training_ip_bist.h
ARM: mvebu: a38x: sync ddr training code with upstream
2018-05-14 10:01:56 +02:00
ddr3_training_ip_centralization.h
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
ddr3_training_ip_db.h
ARM: mvebu: a38x: sync ddr training code with upstream
2018-05-14 10:01:56 +02:00
ddr3_training_ip_def.h
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
ddr3_training_ip_engine.c
common: Move the image globals into image.h
2020-01-17 14:02:35 -05:00
ddr3_training_ip_engine.h
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
ddr3_training_ip_flow.h
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
ddr3_training_ip_pbs.h
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
ddr3_training_ip_prv_if.h
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
ddr3_training_ip.h
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
ddr3_training_leveling.c
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
ddr3_training_leveling.h
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
ddr3_training_pbs.c
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
ddr3_training.c
ddr: marvell: a38x: allow board specific clock out setup
2020-01-21 08:31:49 +01:00
ddr_ml_wrapper.h
ARM: mvebu: a38x: sync ddr training code with upstream
2018-05-14 10:01:56 +02:00
ddr_topology_def.h
ddr: marvell: a38x: allow board specific clock out setup
2020-01-21 08:31:49 +01:00
ddr_training_ip_db.h
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
dram_if.h
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
Makefile
ARM: mvebu: a38x: sync ddr training code with upstream
2018-05-14 10:01:56 +02:00
mv_ddr_build_message.c
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
mv_ddr_common.c
ARM: mvebu: a38x: sync ddr training code with upstream
2018-05-14 10:01:56 +02:00
mv_ddr_common.h
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
mv_ddr_plat.c
ARM: mvebu: restore license information in mv_ddr_plat.{c,h}
2018-12-09 17:10:13 -05:00
mv_ddr_plat.h
ARM: mvebu: restore license information in mv_ddr_plat.{c,h}
2018-12-09 17:10:13 -05:00
mv_ddr_regs.h
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
mv_ddr_spd.c
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
mv_ddr_spd.h
ARM: mvebu: a38x: sync ddr training code with upstream
2018-05-14 10:01:56 +02:00
mv_ddr_sys_env_lib.c
ARM: mvebu: a38x: sync ddr training code with upstream
2018-05-14 10:01:56 +02:00
mv_ddr_sys_env_lib.h
ARM: mvebu: a38x: sync ddr training code with upstream
2018-05-14 10:01:56 +02:00
mv_ddr_topology.c
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
mv_ddr_topology.h
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
mv_ddr_training_db.h
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
seq_exec.h
ARM: mvebu: a38x: sync ddr training code with upstream
2018-05-14 10:01:56 +02:00
xor_regs.h
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
xor.c
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
2018-12-08 16:19:40 +01:00
xor.h
ARM: mvebu: a38x: sync ddr training code with upstream
2018-05-14 10:01:56 +02:00