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4146a31dce
Currently xilinx_pm_request API supports four u32 payloads. However the legacy SMC format supports five u32 request payloads and extended SMC format supports six u32 request payloads. Add support for the same in xilinx_pm_request API. Also add two dummy arguments to all the callers of xilinx_pm_request. The TF-A always fills seven u32 return payload so add support for the same in xilinx_pm_request API. Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Acked-by: Senthil Nathan Thangaraj <senthilnathan.thangaraj@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5ae6b560741f3ca8b89059c4ebb87acf75b4718e.1756388537.git.michal.simek@amd.com
94 lines
2.2 KiB
C
94 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2021 Xilinx, Inc. - Michal Simek
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*/
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#define LOG_CATEGORY UCLASS_RESET
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#include <dm.h>
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#include <dm/device_compat.h>
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#include <reset-uclass.h>
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#include <zynqmp_firmware.h>
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#define ZYNQMP_NR_RESETS (ZYNQMP_PM_RESET_END - ZYNQMP_PM_RESET_START)
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#define ZYNQMP_RESET_ID ZYNQMP_PM_RESET_START
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struct zynqmp_reset_priv {
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u32 reset_id;
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u32 nr_reset;
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};
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static int zynqmp_pm_reset_assert(const u32 reset,
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const enum zynqmp_pm_reset_action assert_flag)
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{
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return xilinx_pm_request(PM_RESET_ASSERT, reset, assert_flag, 0, 0,
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0, 0, NULL);
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}
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static int zynqmp_reset_assert(struct reset_ctl *rst)
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{
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struct zynqmp_reset_priv *priv = dev_get_priv(rst->dev);
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dev_dbg(rst->dev, "%s(rst=%p) (id=%lu)\n", __func__, rst, rst->id);
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return zynqmp_pm_reset_assert(priv->reset_id + rst->id,
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PM_RESET_ACTION_ASSERT);
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}
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static int zynqmp_reset_deassert(struct reset_ctl *rst)
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{
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struct zynqmp_reset_priv *priv = dev_get_priv(rst->dev);
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dev_dbg(rst->dev, "%s(rst=%p) (id=%lu)\n", __func__, rst, rst->id);
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return zynqmp_pm_reset_assert(priv->reset_id + rst->id,
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PM_RESET_ACTION_RELEASE);
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}
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static int zynqmp_reset_request(struct reset_ctl *rst)
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{
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struct zynqmp_reset_priv *priv = dev_get_priv(rst->dev);
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dev_dbg(rst->dev, "%s(rst=%p) (id=%lu) (nr_reset=%d)\n", __func__,
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rst, rst->id, priv->nr_reset);
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if (priv->nr_reset && rst->id > priv->nr_reset)
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return -EINVAL;
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return 0;
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}
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static int zynqmp_reset_probe(struct udevice *dev)
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{
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struct zynqmp_reset_priv *priv = dev_get_priv(dev);
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if (device_is_compatible(dev, "xlnx,zynqmp-reset")) {
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priv->reset_id = ZYNQMP_RESET_ID;
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priv->nr_reset = ZYNQMP_NR_RESETS;
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}
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return 0;
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}
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const struct reset_ops zynqmp_reset_ops = {
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.request = zynqmp_reset_request,
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.rst_assert = zynqmp_reset_assert,
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.rst_deassert = zynqmp_reset_deassert,
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};
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static const struct udevice_id zynqmp_reset_ids[] = {
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{ .compatible = "xlnx,zynqmp-reset" },
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{ .compatible = "xlnx,versal-reset" },
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{ .compatible = "xlnx,versal-net-reset" },
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{ }
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};
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U_BOOT_DRIVER(zynqmp_reset) = {
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.name = "zynqmp_reset",
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.id = UCLASS_RESET,
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.of_match = zynqmp_reset_ids,
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.ops = &zynqmp_reset_ops,
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.probe = zynqmp_reset_probe,
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.priv_auto = sizeof(struct zynqmp_reset_priv),
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};
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