Matthew McClintock 9c6b47d53e p1014rdb: set ddr bus width properly depending on SVR ...

Currently, for NAND boot for the P1010/4RDB we hard code the DDR
configuration. We can still dynamically set the DDR bus width in
the nand spl so the P1010/4RDB boards can boot from the same
u-boot image

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

2012-08-23 10:24:16 -05:00

..

arm

global_data: unify global flag defines

2012-08-09 21:46:32 +02:00

avr32

global_data: unify global flag defines

2012-08-09 21:46:32 +02:00

blackfin

global_data: unify global flag defines

2012-08-09 21:46:32 +02:00

m68k

global_data: unify global flag defines

2012-08-09 21:46:32 +02:00

microblaze

global_data: unify global flag defines

2012-08-09 21:46:32 +02:00

mips

global_data: unify global flag defines

2012-08-09 21:46:32 +02:00

nds32

nds32: fix unused pmu_init warning

2012-08-11 00:43:28 +08:00

nios2

global_data: unify global flag defines

2012-08-09 21:46:32 +02:00

openrisc

openrisc: Work around potential relocation issues

2012-08-09 23:37:45 +02:00

powerpc

p1014rdb: set ddr bus width properly depending on SVR

2012-08-23 10:24:16 -05:00

sandbox

global_data: unify global flag defines

2012-08-09 21:46:32 +02:00

sh

global_data: unify global flag defines

2012-08-09 21:46:32 +02:00

sparc

global_data: unify global flag defines

2012-08-09 21:46:32 +02:00

x86

global_data: unify global flag defines

2012-08-09 21:46:32 +02:00

.gitignore

update include/asm/ gitignore after move

2010-05-07 00:17:30 +02:00