Icenowy Zheng f02abb0608 sunxi: add support for Lichee Pi Zero ...

Lichee Pi Zero is a development board with a V3s SoC, which features
64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not
soldered in production batch), a 40-pin RGB LCD connector and some extra
pins available as 2.54mm pins or stamp holes.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

2017-04-21 09:29:35 +02:00

..

arc

board_f: Rename initdram() to dram_init()

2017-04-13 09:40:57 -04:00

arm

sunxi: add support for Lichee Pi Zero

2017-04-21 09:29:35 +02:00

avr32

Remove various unused interrupt related code

2017-04-06 20:42:18 -04:00

m68k

spi: Zap cf_qspi driver and related code

2017-01-15 18:29:04 +01:00

microblaze

microblaze: Fix endif macro command

2017-02-10 13:59:36 +01:00

mips

board_f: Rename initdram() to dram_init()

2017-04-13 09:40:57 -04:00

nds32

Remove various unused interrupt related code

2017-04-06 20:42:18 -04:00

nios2

board_f: Rename initdram() to dram_init()

2017-04-13 09:40:57 -04:00

powerpc

board_f: Rename initdram() to dram_init()

2017-04-13 09:40:57 -04:00

sandbox

sandbox: Add some test LEDs

2017-04-14 19:38:57 -06:00

sh

sh: generate position independent code for all platforms

2016-12-02 21:32:54 -05:00

x86

x86: Introduce minimal PMU driver for Intel MID platforms

2017-04-10 10:02:03 +08:00

xtensa

board_f: Rename initdram() to dram_init()

2017-04-13 09:40:57 -04:00

.gitignore

…

Kconfig

OpenRISC: Remove

2017-04-05 13:52:34 -04:00