Anthony Felice 4b8cdd484c vf610twr: Fix typo in DRAM init
This commit fixes a typo in vf610twr DRAM init that was causing a hang in
U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc
(vf610: refactor DDRMC code).

Signed-off-by: Anthony Felice <tony.felice@timesys.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-10-16 07:21:09 -04:00
..
2015-09-11 17:12:57 -04:00
2015-09-11 14:59:16 -04:00
2015-09-28 10:48:23 -04:00
2015-08-05 08:44:06 -06:00
2015-09-11 14:57:40 -04:00
2015-10-16 07:21:09 -04:00
2014-11-26 11:21:14 -05:00
2015-09-07 13:41:04 +02:00
2015-01-29 13:11:02 +01:00
2015-09-28 10:48:24 -04:00
2015-09-11 14:52:46 -04:00
2015-10-11 17:12:10 -04:00
2015-09-11 14:59:16 -04:00
2015-03-24 10:50:50 -04:00
2015-09-15 13:55:23 -04:00
2015-10-15 11:16:17 +02:00
2015-01-12 09:38:47 -05:00