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40c477c71c
Split imx_pinctrl_set_state() into imx_pinctrl_set_state_common() and imx_pinctrl_set_state_mmio(). The former does the common configuration parsing, the later does call imx_pinctrl_set_state_common() and then does pin configuration using either SCU or MMIO accesses. The SCU part is going to be moved out in follow up patches. This is a preparatory patch for follow up pinctrl drivers which do not use the MMIO accessors, but some other means, like SCU or otherwise. Those will call the common imx_pinctrl_set_state_common() function wrapped into some other imx_pinctrl_set_state_*() function, in a way similar to imx_pinctrl_set_state_mmio() does so for MMIO accesses. Update all imx_pinctrl_set_state_mmio() call sites to call imx_pinctrl_set_state_mmio() instead. No functional change. Signed-off-by: Marek Vasut <marex@denx.de>
40 lines
1.0 KiB
C
40 lines
1.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2020 NXP
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*
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*/
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#include <dm.h>
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#include <dm/pinctrl.h>
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#include "pinctrl-imx.h"
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static struct imx_pinctrl_soc_info imx8ulp_pinctrl_soc_info0 = {
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.flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG | CFG_IBE_OBE,
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};
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static struct imx_pinctrl_soc_info imx8ulp_pinctrl_soc_info1 = {
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.flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG | CFG_IBE_OBE,
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};
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static const struct udevice_id imx8ulp_pinctrl_match[] = {
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{ .compatible = "fsl,imx8ulp-iomuxc0", .data = (ulong)&imx8ulp_pinctrl_soc_info0 },
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{ .compatible = "fsl,imx8ulp-iomuxc1", .data = (ulong)&imx8ulp_pinctrl_soc_info1 },
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{ /* sentinel */ }
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};
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static const struct pinctrl_ops imx8ulp_pinctrl_ops = {
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.set_state = imx_pinctrl_set_state_mmio,
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};
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U_BOOT_DRIVER(imx8ulp_pinctrl) = {
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.name = "imx8ulp-pinctrl",
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.id = UCLASS_PINCTRL,
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.of_match = of_match_ptr(imx8ulp_pinctrl_match),
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.probe = imx_pinctrl_probe_mmio,
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.remove = imx_pinctrl_remove_mmio,
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.priv_auto = sizeof(struct imx_pinctrl_priv),
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.ops = &imx8ulp_pinctrl_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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