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7d1936aef7
The Allwinner A100 SoC has been around for a while, and has now seemingly been replaced with its close sibling A133. Add support for the CCU, as far as used by U-Boot proper. Linux has some basic (clock and pinctrl) support for a while, so we can already use the existing binding headers. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
103 lines
2.9 KiB
C
103 lines
2.9 KiB
C
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2023-2024 Arm Ltd.
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*/
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#include <clk/sunxi.h>
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#include <dt-bindings/clock/sun50i-a100-ccu.h>
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#include <dt-bindings/reset/sun50i-a100-ccu.h>
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#include <linux/bitops.h>
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static struct ccu_clk_gate a100_gates[] = {
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[CLK_PLL_PERIPH0] = GATE(0x020, BIT(31) | BIT(27)),
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[CLK_APB1] = GATE_DUMMY,
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[CLK_DE] = GATE(0x600, BIT(31)),
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[CLK_BUS_DE] = GATE(0x60c, BIT(0)),
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[CLK_BUS_MMC0] = GATE(0x84c, BIT(0)),
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[CLK_BUS_MMC1] = GATE(0x84c, BIT(1)),
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[CLK_BUS_MMC2] = GATE(0x84c, BIT(2)),
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[CLK_BUS_UART0] = GATE(0x90c, BIT(0)),
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[CLK_BUS_UART1] = GATE(0x90c, BIT(1)),
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[CLK_BUS_UART2] = GATE(0x90c, BIT(2)),
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[CLK_BUS_UART3] = GATE(0x90c, BIT(3)),
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[CLK_BUS_UART4] = GATE(0x90c, BIT(4)),
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[CLK_BUS_I2C0] = GATE(0x91c, BIT(0)),
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[CLK_BUS_I2C1] = GATE(0x91c, BIT(1)),
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[CLK_BUS_I2C2] = GATE(0x91c, BIT(2)),
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[CLK_BUS_I2C3] = GATE(0x91c, BIT(3)),
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[CLK_SPI0] = GATE(0x940, BIT(31)),
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[CLK_SPI1] = GATE(0x944, BIT(31)),
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[CLK_SPI2] = GATE(0x948, BIT(31)),
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[CLK_BUS_SPI0] = GATE(0x96c, BIT(0)),
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[CLK_BUS_SPI1] = GATE(0x96c, BIT(1)),
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[CLK_BUS_SPI2] = GATE(0x96c, BIT(2)),
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[CLK_BUS_EMAC] = GATE(0x97c, BIT(0)),
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[CLK_USB_PHY0] = GATE(0xa70, BIT(29)),
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[CLK_USB_OHCI0] = GATE(0xa70, BIT(31)),
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[CLK_USB_PHY1] = GATE(0xa74, BIT(29)),
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[CLK_USB_OHCI1] = GATE(0xa74, BIT(31)),
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[CLK_BUS_OHCI0] = GATE(0xa8c, BIT(0)),
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[CLK_BUS_OHCI1] = GATE(0xa8c, BIT(1)),
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[CLK_BUS_EHCI0] = GATE(0xa8c, BIT(4)),
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[CLK_BUS_EHCI1] = GATE(0xa8c, BIT(5)),
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[CLK_BUS_OTG] = GATE(0xa8c, BIT(8)),
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[CLK_TCON_LCD] = GATE(0xb60, BIT(31)),
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[CLK_BUS_TCON_LCD] = GATE(0xb7c, BIT(0)),
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};
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static struct ccu_reset a100_resets[] = {
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[RST_BUS_DE] = RESET(0x60c, BIT(16)),
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[RST_BUS_MMC0] = RESET(0x84c, BIT(16)),
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[RST_BUS_MMC1] = RESET(0x84c, BIT(17)),
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[RST_BUS_MMC2] = RESET(0x84c, BIT(18)),
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[RST_BUS_UART0] = RESET(0x90c, BIT(16)),
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[RST_BUS_UART1] = RESET(0x90c, BIT(17)),
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[RST_BUS_UART2] = RESET(0x90c, BIT(18)),
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[RST_BUS_UART3] = RESET(0x90c, BIT(19)),
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[RST_BUS_UART4] = RESET(0x90c, BIT(20)),
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[RST_BUS_I2C0] = RESET(0x91c, BIT(16)),
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[RST_BUS_I2C1] = RESET(0x91c, BIT(17)),
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[RST_BUS_I2C2] = RESET(0x91c, BIT(18)),
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[RST_BUS_I2C3] = RESET(0x91c, BIT(19)),
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[RST_BUS_SPI0] = RESET(0x96c, BIT(16)),
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[RST_BUS_SPI1] = RESET(0x96c, BIT(17)),
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[RST_BUS_SPI2] = RESET(0x96c, BIT(18)),
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[RST_BUS_EMAC] = RESET(0x97c, BIT(16)),
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[RST_USB_PHY0] = RESET(0xa70, BIT(30)),
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[RST_USB_PHY1] = RESET(0xa74, BIT(30)),
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[RST_BUS_OHCI0] = RESET(0xa8c, BIT(16)),
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[RST_BUS_OHCI1] = RESET(0xa8c, BIT(17)),
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[RST_BUS_EHCI0] = RESET(0xa8c, BIT(20)),
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[RST_BUS_EHCI1] = RESET(0xa8c, BIT(21)),
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[RST_BUS_OTG] = RESET(0xa8c, BIT(24)),
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[RST_BUS_TCON_LCD] = RESET(0xb7c, BIT(16)),
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};
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const struct ccu_desc a100_ccu_desc = {
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.gates = a100_gates,
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.resets = a100_resets,
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.num_gates = ARRAY_SIZE(a100_gates),
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.num_resets = ARRAY_SIZE(a100_resets),
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};
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