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7c5460afec
If we try to enable a gate clock that doesn't exist, we used to just fail silently. This may make sense for early bringup of some core peripherals that we know are already enabled, but it only makes debugging missing clocks more difficult. Bubble up errors now that qcom_gate_clk_en() can return an error code to catch any still-missing clocks and make it easier to find missing ones as more complicated peripherals are enabled. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250314-sc7280-more-clocks-v1-1-ead54487c38e@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
318 lines
12 KiB
C
318 lines
12 KiB
C
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Clock drivers for Qualcomm SM8150
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*
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* Volodymyr Babchuk <volodymyr_babchuk@epam.com>
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* Copyright (c) 2024 EPAM Systems.
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*
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* (C) Copyright 2024 Julius Lehmann <lehmanju@devpi.de>
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*
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* Based on U-Boot driver for SM8250. Constants are taken from the Linux driver.
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*/
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#include <clk-uclass.h>
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#include <dm.h>
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#include <errno.h>
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#include <asm/io.h>
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#include <linux/bitops.h>
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#include <dt-bindings/clock/qcom,gcc-sm8150.h>
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#include "clock-qcom.h"
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#define EMAC_RGMII_CLK_CMD_RCGR 0x601c
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#define QUPV3_WRAP0_S0_CLK_CMD_RCGR 0x18148
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#define USB30_PRIM_MASTER_CLK_CMD_RCGR 0xf01c
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#define USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR 0xf034
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#define USB30_PRIM_PHY_AUX_CLK_CMD_RCGR 0xf060
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#define USB30_SEC_MASTER_CLK_CMD_RCGR 0x1001c
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#define USB30_SEC_MOCK_UTMI_CLK_CMD_RCGR 0x10034
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#define USB30_SEC_PHY_AUX_CLK_CMD_RCGR 0x10060
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#define SDCC2_APPS_CLK_CMD_RCGR 0x1400c
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static struct pll_vote_clk gpll7_vote_clk = {
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.status = 0x1a000,
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.status_bit = BIT(31),
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.ena_vote = 0x52000,
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.vote_bit = BIT(7),
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};
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static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = {
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F(7372800, CFG_CLK_SRC_GPLL0_EVEN, 1, 384, 15625),
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F(14745600, CFG_CLK_SRC_GPLL0_EVEN, 1, 768, 15625),
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F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
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F(29491200, CFG_CLK_SRC_GPLL0_EVEN, 1, 1536, 15625),
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F(32000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 75),
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F(48000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 25),
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F(64000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 16, 75),
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F(80000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 15),
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F(96000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 25),
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F(100000000, CFG_CLK_SRC_GPLL0_EVEN, 3, 0, 0),
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F(102400000, CFG_CLK_SRC_GPLL0_EVEN, 1, 128, 375),
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F(112000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 28, 75),
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F(117964800, CFG_CLK_SRC_GPLL0_EVEN, 1, 6144, 15625),
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F(120000000, CFG_CLK_SRC_GPLL0_EVEN, 2.5, 0, 0),
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F(128000000, CFG_CLK_SRC_GPLL0, 1, 16, 75),
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{ }
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};
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static const struct freq_tbl ftbl_gcc_emac_rgmii_clk_src[] = {
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F(2500000, CFG_CLK_SRC_CXO, 1, 25, 192),
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F(5000000, CFG_CLK_SRC_CXO, 1, 25, 96),
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F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
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F(25000000, CFG_CLK_SRC_GPLL0_EVEN, 12, 0, 0),
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F(50000000, CFG_CLK_SRC_GPLL0_EVEN, 6, 0, 0),
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F(125000000, CFG_CLK_SRC_GPLL7, 4, 0, 0),
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F(250000000, CFG_CLK_SRC_GPLL7, 2, 0, 0),
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{ }
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};
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static const struct freq_tbl ftbl_gcc_usb30_prim_master_clk_src[] = {
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F(33333333, CFG_CLK_SRC_GPLL0_EVEN, 9, 0, 0),
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F(66666667, CFG_CLK_SRC_GPLL0_EVEN, 4.5, 0, 0),
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F(133333333, CFG_CLK_SRC_GPLL0, 4.5, 0, 0),
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F(200000000, CFG_CLK_SRC_GPLL0, 3, 0, 0),
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F(240000000, CFG_CLK_SRC_GPLL0, 2.5, 0, 0),
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{ }
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};
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static const struct freq_tbl ftbl_gcc_usb30_prim_mock_utmi_clk_src[] = {
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F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
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F(20000000, CFG_CLK_SRC_GPLL0_EVEN, 15, 0, 0),
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F(60000000, CFG_CLK_SRC_GPLL0_EVEN, 5, 0, 0),
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{ }
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};
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static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = {
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F(400000, CFG_CLK_SRC_CXO, 12, 1, 4),
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F(9600000, CFG_CLK_SRC_CXO, 2, 0, 0),
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F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
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F(25000000, CFG_CLK_SRC_GPLL0, 12, 1, 2),
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F(50000000, CFG_CLK_SRC_GPLL0, 12, 0, 0),
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F(100000000, CFG_CLK_SRC_GPLL0, 6, 0, 0),
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F(202000000, CFG_CLK_SRC_GPLL0, 4, 0, 0),
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{ }
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};
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static ulong sm8150_clk_set_rate(struct clk *clk, ulong rate)
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{
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struct msm_clk_priv *priv = dev_get_priv(clk->dev);
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const struct freq_tbl *freq;
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switch (clk->id) {
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case GCC_QUPV3_WRAP1_S4_CLK: /* UART2 aka debug-uart */
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freq = qcom_find_freq(ftbl_gcc_qupv3_wrap0_s0_clk_src, rate);
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clk_rcg_set_rate_mnd(priv->base, QUPV3_WRAP0_S0_CLK_CMD_RCGR,
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freq->pre_div, freq->m, freq->n, freq->src, 16);
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return freq->freq;
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case GCC_EMAC_RGMII_CLK:
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freq = qcom_find_freq(ftbl_gcc_emac_rgmii_clk_src, rate);
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clk_rcg_set_rate_mnd(priv->base, EMAC_RGMII_CLK_CMD_RCGR,
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freq->pre_div, freq->m, freq->n, freq->src, 8);
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return freq->freq;
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case GCC_USB30_PRIM_MASTER_CLK:
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freq = qcom_find_freq(ftbl_gcc_usb30_prim_master_clk_src, rate);
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clk_rcg_set_rate_mnd(priv->base, USB30_PRIM_MASTER_CLK_CMD_RCGR,
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freq->pre_div, freq->m, freq->n, freq->src, 8);
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return freq->freq;
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case GCC_USB30_PRIM_MOCK_UTMI_CLK:
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freq = qcom_find_freq(ftbl_gcc_usb30_prim_mock_utmi_clk_src, rate);
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clk_rcg_set_rate_mnd(priv->base, USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR,
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freq->pre_div, freq->m, freq->n, freq->src, 0);
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return freq->freq;
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case GCC_USB3_PRIM_PHY_AUX_CLK_SRC:
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freq = qcom_find_freq(ftbl_gcc_usb30_prim_mock_utmi_clk_src, rate);
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clk_rcg_set_rate_mnd(priv->base, USB30_PRIM_PHY_AUX_CLK_CMD_RCGR,
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freq->pre_div, freq->m, freq->n, freq->src, 0);
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return freq->freq;
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case GCC_USB30_SEC_MASTER_CLK:
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freq = qcom_find_freq(ftbl_gcc_usb30_prim_master_clk_src, rate);
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clk_rcg_set_rate_mnd(priv->base, USB30_SEC_MASTER_CLK_CMD_RCGR,
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freq->pre_div, freq->m, freq->n, freq->src, 8);
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return freq->freq;
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case GCC_USB30_SEC_MOCK_UTMI_CLK:
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freq = qcom_find_freq(ftbl_gcc_usb30_prim_mock_utmi_clk_src, rate);
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clk_rcg_set_rate_mnd(priv->base, USB30_SEC_MOCK_UTMI_CLK_CMD_RCGR,
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freq->pre_div, freq->m, freq->n, freq->src, 0);
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return freq->freq;
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case GCC_USB3_SEC_PHY_AUX_CLK_SRC:
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freq = qcom_find_freq(ftbl_gcc_usb30_prim_mock_utmi_clk_src, rate);
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clk_rcg_set_rate_mnd(priv->base, USB30_SEC_PHY_AUX_CLK_CMD_RCGR,
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freq->pre_div, freq->m, freq->n, freq->src, 0);
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return freq->freq;
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case GCC_SDCC2_APPS_CLK:
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freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate);
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clk_rcg_set_rate_mnd(priv->base, SDCC2_APPS_CLK_CMD_RCGR,
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freq->pre_div, freq->m, freq->n, freq->src, 8);
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return freq->freq;
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default:
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return 0;
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}
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}
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static const struct gate_clk sm8150_clks[] = {
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GATE_CLK(GCC_AGGRE_UFS_CARD_AXI_CLK, 0x750c0, 0x00000001),
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GATE_CLK(GCC_AGGRE_UFS_PHY_AXI_CLK, 0x770c0, 0x00000001),
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GATE_CLK(GCC_AGGRE_USB3_PRIM_AXI_CLK, 0xf07c, 0x00000001),
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GATE_CLK(GCC_AGGRE_USB3_SEC_AXI_CLK, 0x1007c, 0x00000001),
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GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0xf078, 0x00000001),
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GATE_CLK(GCC_CFG_NOC_USB3_SEC_AXI_CLK, 0x10078, 0x00000001),
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GATE_CLK(GCC_QUPV3_WRAP0_S0_CLK, 0x5200c, 0x00000400),
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GATE_CLK(GCC_QUPV3_WRAP0_S1_CLK, 0x5200c, 0x00000800),
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GATE_CLK(GCC_QUPV3_WRAP0_S2_CLK, 0x5200c, 0x00001000),
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GATE_CLK(GCC_QUPV3_WRAP0_S3_CLK, 0x5200c, 0x00002000),
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GATE_CLK(GCC_QUPV3_WRAP0_S4_CLK, 0x5200c, 0x00004000),
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GATE_CLK(GCC_QUPV3_WRAP0_S5_CLK, 0x5200c, 0x00008000),
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GATE_CLK(GCC_QUPV3_WRAP1_S0_CLK, 0x5200c, 0x00400000),
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GATE_CLK(GCC_QUPV3_WRAP1_S1_CLK, 0x5200c, 0x00800000),
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GATE_CLK(GCC_QUPV3_WRAP1_S3_CLK, 0x5200c, 0x02000000),
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GATE_CLK(GCC_QUPV3_WRAP1_S4_CLK, 0x5200c, 0x04000000),
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GATE_CLK(GCC_QUPV3_WRAP1_S5_CLK, 0x5200c, 0x08000000),
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GATE_CLK(GCC_QUPV3_WRAP_0_M_AHB_CLK, 0x5200c, 0x00000040),
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GATE_CLK(GCC_QUPV3_WRAP_0_S_AHB_CLK, 0x5200c, 0x00000080),
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GATE_CLK(GCC_QUPV3_WRAP_1_M_AHB_CLK, 0x5200c, 0x00100000),
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GATE_CLK(GCC_QUPV3_WRAP_1_S_AHB_CLK, 0x5200c, 0x00200000),
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GATE_CLK(GCC_SDCC2_AHB_CLK, 0x14008, 0x00000001),
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GATE_CLK(GCC_SDCC2_APPS_CLK, 0x14004, 0x00000001),
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GATE_CLK(GCC_SDCC4_AHB_CLK, 0x16008, 0x00000001),
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GATE_CLK(GCC_SDCC4_APPS_CLK, 0x16004, 0x00000001),
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GATE_CLK(GCC_UFS_CARD_AHB_CLK, 0x75014, 0x00000001),
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GATE_CLK(GCC_UFS_CARD_AXI_CLK, 0x75010, 0x00000001),
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GATE_CLK(GCC_UFS_CARD_CLKREF_CLK, 0x8c004, 0x00000001),
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GATE_CLK(GCC_UFS_CARD_ICE_CORE_CLK, 0x7505c, 0x00000001),
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GATE_CLK(GCC_UFS_CARD_PHY_AUX_CLK, 0x75090, 0x00000001),
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GATE_CLK(GCC_UFS_CARD_RX_SYMBOL_0_CLK, 0x7501c, 0x00000001),
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GATE_CLK(GCC_UFS_CARD_RX_SYMBOL_1_CLK, 0x750ac, 0x00000001),
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GATE_CLK(GCC_UFS_CARD_TX_SYMBOL_0_CLK, 0x75018, 0x00000001),
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GATE_CLK(GCC_UFS_CARD_UNIPRO_CORE_CLK, 0x75058, 0x00000001),
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GATE_CLK(GCC_UFS_MEM_CLKREF_CLK, 0x8c000, 0x00000001),
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GATE_CLK(GCC_UFS_PHY_AHB_CLK, 0x77014, 0x00000001),
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GATE_CLK(GCC_UFS_PHY_AXI_CLK, 0x77010, 0x00000001),
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GATE_CLK(GCC_UFS_PHY_ICE_CORE_CLK, 0x7705c, 0x00000001),
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GATE_CLK(GCC_UFS_PHY_PHY_AUX_CLK, 0x77090, 0x00000001),
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GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_0_CLK, 0x7701c, 0x00000001),
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GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_1_CLK, 0x770ac, 0x00000001),
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GATE_CLK(GCC_UFS_PHY_TX_SYMBOL_0_CLK, 0x77018, 0x00000001),
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GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_CLK, 0x77058, 0x00000001),
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GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x0f00c, 0x00000001),
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GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x0f014, 0x00000001),
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GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x0f010, 0x00000001),
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GATE_CLK(GCC_USB30_SEC_MASTER_CLK, 0x1000c, 0x00000001),
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GATE_CLK(GCC_USB30_SEC_MOCK_UTMI_CLK, 0x10014, 0x00000001),
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GATE_CLK(GCC_USB30_SEC_SLEEP_CLK, 0x10010, 0x00000001),
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GATE_CLK(GCC_USB3_PRIM_CLKREF_CLK, 0x8c008, 0x00000001),
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GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0x0f04c, 0x00000001),
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GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x0f050, 0x00000001),
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GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0x0f054, 0x00000001),
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GATE_CLK(GCC_USB3_SEC_CLKREF_CLK, 0x8c028, 0x00000001),
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GATE_CLK(GCC_USB3_SEC_PHY_AUX_CLK, 0x1004c, 0x00000001),
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GATE_CLK(GCC_USB3_SEC_PHY_PIPE_CLK, 0x10054, 0x00000001),
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GATE_CLK(GCC_USB3_SEC_PHY_COM_AUX_CLK, 0x10050, 0x00000001),
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GATE_CLK(GCC_EMAC_AXI_CLK, 0x06010, 0x00000001),
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GATE_CLK(GCC_EMAC_SLV_AHB_CLK, 0x06014, 0x00000001),
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GATE_CLK(GCC_EMAC_PTP_CLK, 0x06034, 0x00000001),
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GATE_CLK(GCC_EMAC_RGMII_CLK, 0x06018, 0x00000001),
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};
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static int sm8150_clk_enable(struct clk *clk)
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{
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struct msm_clk_priv *priv = dev_get_priv(clk->dev);
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if (priv->data->num_clks <= clk->id) {
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debug("%s: unknown clk id %lu\n", __func__, clk->id);
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return 0;
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}
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debug("%s: clk %s\n", __func__, sm8150_clks[clk->id].name);
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switch (clk->id) {
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case GCC_EMAC_RGMII_CLK:
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clk_enable_gpll0(priv->base, &gpll7_vote_clk);
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case GCC_AGGRE_USB3_PRIM_AXI_CLK:
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qcom_gate_clk_en(priv, GCC_USB30_PRIM_MASTER_CLK);
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fallthrough;
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case GCC_USB30_PRIM_MASTER_CLK:
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qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK);
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qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK);
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break;
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case GCC_AGGRE_USB3_SEC_AXI_CLK:
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qcom_gate_clk_en(priv, GCC_USB30_SEC_MASTER_CLK);
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fallthrough;
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case GCC_USB30_SEC_MASTER_CLK:
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qcom_gate_clk_en(priv, GCC_USB3_SEC_PHY_AUX_CLK);
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qcom_gate_clk_en(priv, GCC_USB3_SEC_PHY_COM_AUX_CLK);
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break;
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};
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return qcom_gate_clk_en(priv, clk->id);
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}
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static const struct qcom_reset_map sm8150_gcc_resets[] = {
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[GCC_EMAC_BCR] = { 0x6000 },
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[GCC_GPU_BCR] = { 0x71000 },
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[GCC_MMSS_BCR] = { 0xb000 },
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[GCC_NPU_BCR] = { 0x4d000 },
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[GCC_PCIE_0_BCR] = { 0x6b000 },
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[GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
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[GCC_PCIE_1_BCR] = { 0x8d000 },
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[GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
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[GCC_PCIE_PHY_BCR] = { 0x6f000 },
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[GCC_PDM_BCR] = { 0x33000 },
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[GCC_PRNG_BCR] = { 0x34000 },
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[GCC_QSPI_BCR] = { 0x24008 },
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[GCC_QUPV3_WRAPPER_0_BCR] = { 0x17000 },
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[GCC_QUPV3_WRAPPER_1_BCR] = { 0x18000 },
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[GCC_QUPV3_WRAPPER_2_BCR] = { 0x1e000 },
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[GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 },
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[GCC_QUSB2PHY_SEC_BCR] = { 0x12004 },
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[GCC_USB3_PHY_PRIM_BCR] = { 0x50000 },
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[GCC_USB3_DP_PHY_PRIM_BCR] = { 0x50008 },
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[GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
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[GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
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[GCC_SDCC2_BCR] = { 0x14000 },
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[GCC_SDCC4_BCR] = { 0x16000 },
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[GCC_TSIF_BCR] = { 0x36000 },
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[GCC_UFS_CARD_BCR] = { 0x75000 },
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[GCC_UFS_PHY_BCR] = { 0x77000 },
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[GCC_USB30_PRIM_BCR] = { 0xf000 },
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[GCC_USB30_SEC_BCR] = { 0x10000 },
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[GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 },
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};
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static const struct qcom_power_map sm8150_gcc_power_domains[] = {
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[EMAC_GDSC] = { 0x6004 },
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[PCIE_0_GDSC] = { 0x6b004 },
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[PCIE_1_GDSC] = { 0x8d004 },
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[UFS_CARD_GDSC] = { 0x75004 },
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[UFS_PHY_GDSC] = { 0x77004 },
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[USB30_PRIM_GDSC] = { 0xf004 },
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[USB30_SEC_GDSC] = { 0x10004 },
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};
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static struct msm_clk_data sm8150_clk_data = {
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.resets = sm8150_gcc_resets,
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.num_resets = ARRAY_SIZE(sm8150_gcc_resets),
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.clks = sm8150_clks,
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.num_clks = ARRAY_SIZE(sm8150_clks),
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.power_domains = sm8150_gcc_power_domains,
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.num_power_domains = ARRAY_SIZE(sm8150_gcc_power_domains),
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.enable = sm8150_clk_enable,
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.set_rate = sm8150_clk_set_rate,
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};
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static const struct udevice_id gcc_sm8150_of_match[] = {
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{
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.compatible = "qcom,gcc-sm8150",
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.data = (ulong)&sm8150_clk_data,
|
|
},
|
|
{ }
|
|
};
|
|
|
|
U_BOOT_DRIVER(gcc_sm8150) = {
|
|
.name = "gcc_sm8150",
|
|
.id = UCLASS_NOP,
|
|
.of_match = gcc_sm8150_of_match,
|
|
.bind = qcom_cc_bind,
|
|
.flags = DM_FLAG_PRE_RELOC,
|
|
};
|