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63272cc474
Due to feature domains management, there is no more need to maintain the fdt cleanup. Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
257 lines
6.3 KiB
C
257 lines
6.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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/*
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* Copyright (C) 2019-2020, STMicroelectronics - All Rights Reserved
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*/
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#define LOG_CATEGORY LOGC_ARCH
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#include <fdtdec.h>
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#include <fdt_support.h>
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#include <log.h>
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#include <tee.h>
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#include <mach/stm32.h>
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#include <asm/arch/sys_proto.h>
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#include <dt-bindings/pinctrl/stm32-pinfunc.h>
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#include <linux/io.h>
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#define STM32MP13_FDCAN_BASE 0x4400F000
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#define STM32MP13_ADC1_BASE 0x48003000
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#define STM32MP13_TSC_BASE 0x5000B000
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#define STM32MP13_CRYP_BASE 0x54002000
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#define STM32MP13_ETH2_BASE 0x5800E000
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#define STM32MP13_DCMIPP_BASE 0x5A000000
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#define STM32MP13_LTDC_BASE 0x5A010000
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#define STM32MP15_FDCAN_BASE 0x4400e000
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#define STM32MP15_CRYP2_BASE 0x4c005000
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#define STM32MP15_CRYP1_BASE 0x54001000
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#define STM32MP15_GPU_BASE 0x59000000
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#define STM32MP15_DSI_BASE 0x5a000000
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/* fdt helper */
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static bool fdt_disable_subnode_by_address(void *fdt, int offset, u32 addr)
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{
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int node;
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fdt_addr_t regs;
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for (node = fdt_first_subnode(fdt, offset);
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node >= 0;
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node = fdt_next_subnode(fdt, node)) {
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regs = fdtdec_get_addr(fdt, node, "reg");
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if (addr == regs) {
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if (fdtdec_get_is_enabled(fdt, node)) {
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fdt_status_disabled(fdt, node);
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return true;
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}
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return false;
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}
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}
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return false;
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}
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/* deactivate all the cpu except core 0 */
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static void stm32_fdt_fixup_cpu(void *blob, char *name)
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{
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int off;
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u32 reg;
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off = fdt_path_offset(blob, "/cpus");
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if (off < 0) {
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log_warning("%s: couldn't find /cpus node\n", __func__);
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return;
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}
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off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
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while (off != -FDT_ERR_NOTFOUND) {
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reg = fdtdec_get_addr(blob, off, "reg");
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if (reg != 0) {
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fdt_del_node(blob, off);
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log_notice("FDT: cpu %d node remove for %s\n",
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reg, name);
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/* after delete we can't trust the offsets anymore */
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off = -1;
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}
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off = fdt_node_offset_by_prop_value(blob, off,
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"device_type", "cpu", 4);
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}
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}
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static void stm32_fdt_disable(void *fdt, int offset, u32 addr,
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const char *string, const char *name)
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{
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if (fdt_disable_subnode_by_address(fdt, offset, addr))
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log_notice("FDT: %s@%08x node disabled for %s\n",
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string, addr, name);
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}
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static void stm32_fdt_disable_optee(void *blob)
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{
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int off, node;
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/* Delete "optee" firmware node */
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off = fdt_node_offset_by_compatible(blob, -1, "linaro,optee-tz");
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if (off >= 0 && fdtdec_get_is_enabled(blob, off))
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fdt_del_node(blob, off);
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/* Delete "optee@..." reserved-memory node */
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off = fdt_path_offset(blob, "/reserved-memory/");
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if (off < 0)
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return;
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for (node = fdt_first_subnode(blob, off);
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node >= 0;
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node = fdt_next_subnode(blob, node)) {
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if (strncmp(fdt_get_name(blob, node, NULL), "optee@", 6))
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continue;
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if (fdt_del_node(blob, node))
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printf("Failed to remove optee reserved-memory node\n");
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}
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}
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static void stm32mp13_fdt_fixup(void *blob, int soc, u32 cpu, char *name)
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{
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switch (cpu) {
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case CPU_STM32MP131Fxx:
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case CPU_STM32MP131Dxx:
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case CPU_STM32MP131Cxx:
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case CPU_STM32MP131Axx:
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stm32_fdt_disable(blob, soc, STM32MP13_FDCAN_BASE, "can", name);
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stm32_fdt_disable(blob, soc, STM32MP13_ADC1_BASE, "adc", name);
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fallthrough;
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case CPU_STM32MP133Fxx:
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case CPU_STM32MP133Dxx:
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case CPU_STM32MP133Cxx:
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case CPU_STM32MP133Axx:
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stm32_fdt_disable(blob, soc, STM32MP13_LTDC_BASE, "ltdc", name);
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stm32_fdt_disable(blob, soc, STM32MP13_DCMIPP_BASE, "dcmipp",
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name);
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stm32_fdt_disable(blob, soc, STM32MP13_TSC_BASE, "tsc", name);
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break;
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default:
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break;
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}
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switch (cpu) {
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case CPU_STM32MP135Dxx:
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case CPU_STM32MP135Axx:
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case CPU_STM32MP133Dxx:
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case CPU_STM32MP133Axx:
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case CPU_STM32MP131Dxx:
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case CPU_STM32MP131Axx:
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stm32_fdt_disable(blob, soc, STM32MP13_CRYP_BASE, "cryp", name);
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break;
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default:
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break;
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}
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}
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static void stm32mp15_fdt_fixup(void *blob, int soc, u32 cpu, char *name)
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{
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u32 pkg;
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switch (cpu) {
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case CPU_STM32MP151Fxx:
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case CPU_STM32MP151Dxx:
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case CPU_STM32MP151Cxx:
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case CPU_STM32MP151Axx:
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stm32_fdt_fixup_cpu(blob, name);
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/* after cpu delete we can't trust the soc offsets anymore */
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soc = fdt_path_offset(blob, "/soc");
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stm32_fdt_disable(blob, soc, STM32MP15_FDCAN_BASE, "can", name);
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fallthrough;
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case CPU_STM32MP153Fxx:
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case CPU_STM32MP153Dxx:
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case CPU_STM32MP153Cxx:
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case CPU_STM32MP153Axx:
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stm32_fdt_disable(blob, soc, STM32MP15_GPU_BASE, "gpu", name);
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stm32_fdt_disable(blob, soc, STM32MP15_DSI_BASE, "dsi", name);
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break;
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default:
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break;
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}
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switch (cpu) {
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case CPU_STM32MP157Dxx:
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case CPU_STM32MP157Axx:
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case CPU_STM32MP153Dxx:
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case CPU_STM32MP153Axx:
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case CPU_STM32MP151Dxx:
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case CPU_STM32MP151Axx:
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stm32_fdt_disable(blob, soc, STM32MP15_CRYP1_BASE, "cryp",
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name);
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stm32_fdt_disable(blob, soc, STM32MP15_CRYP2_BASE, "cryp",
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name);
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break;
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default:
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break;
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}
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switch (get_cpu_package()) {
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case STM32MP15_PKG_AA_LBGA448:
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pkg = STM32MP_PKG_AA;
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break;
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case STM32MP15_PKG_AB_LBGA354:
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pkg = STM32MP_PKG_AB;
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break;
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case STM32MP15_PKG_AC_TFBGA361:
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pkg = STM32MP_PKG_AC;
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break;
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case STM32MP15_PKG_AD_TFBGA257:
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pkg = STM32MP_PKG_AD;
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break;
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default:
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pkg = 0;
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break;
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}
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if (pkg) {
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do_fixup_by_compat_u32(blob, "st,stm32mp157-pinctrl",
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"st,package", pkg, false);
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do_fixup_by_compat_u32(blob, "st,stm32mp157-z-pinctrl",
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"st,package", pkg, false);
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}
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}
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/*
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* This function is called right before the kernel is booted. "blob" is the
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* device tree that will be passed to the kernel.
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*/
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int ft_system_setup(void *blob, struct bd_info *bd)
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{
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int ret = 0;
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int soc;
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u32 cpu;
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char name[SOC_NAME_SIZE];
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soc = fdt_path_offset(blob, "/soc");
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/* when absent, nothing to do */
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if (soc == -FDT_ERR_NOTFOUND)
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return 0;
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if (soc < 0)
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return soc;
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/* MPUs Part Numbers and name*/
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cpu = get_cpu_type();
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get_soc_name(name);
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if (IS_ENABLED(CONFIG_STM32MP13X))
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stm32mp13_fdt_fixup(blob, soc, cpu, name);
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if (IS_ENABLED(CONFIG_STM32MP15X)) {
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stm32mp15_fdt_fixup(blob, soc, cpu, name);
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/*
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* TEMP: remove OP-TEE nodes in kernel device tree
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* copied from U-Boot device tree by optee_copy_fdt_nodes
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* when OP-TEE is not detected (probe failed)
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* these OP-TEE nodes are present in <board>-u-boot.dtsi
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* under CONFIG_STM32MP15x_STM32IMAGE only for compatibility
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* when FIP is not used by TF-A
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*/
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if (IS_ENABLED(CONFIG_STM32MP15X_STM32IMAGE) &&
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!tee_find_device(NULL, NULL, NULL, NULL))
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stm32_fdt_disable_optee(blob);
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}
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return ret;
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}
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