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a65c35ed77
This enum is needed to generate build-time devices. Tell dtoc where to find the header, to avoid compile errors in the generated code. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
98 lines
2.2 KiB
C
98 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2019 Google LLC
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*/
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#include <common.h>
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#include <dm.h>
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#include <log.h>
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#include <spl.h>
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#include <asm/cpu.h>
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#include <asm/cpu_common.h>
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#include <asm/intel_regs.h>
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#include <asm/io.h>
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#include <asm/pci.h>
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#include <asm/arch/systemagent.h>
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#include <linux/delay.h>
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/*
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* Punit Initialisation code. This all isn't documented, but
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* this is the recipe.
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*/
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static int punit_init(struct udevice *dev)
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{
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struct udevice *cpu;
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u32 reg;
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ulong start;
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int ret;
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/* Thermal throttle activation offset */
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ret = uclass_first_device_err(UCLASS_CPU, &cpu);
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if (ret)
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return log_msg_ret("Cannot find CPU", ret);
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cpu_configure_thermal_target(cpu);
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/*
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* Software Core Disable Mask (P_CR_CORE_DISABLE_MASK_0_0_0_MCHBAR).
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* Enable all cores here.
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*/
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writel(0, MCHBAR_REG(CORE_DISABLE_MASK));
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/* P-Unit bring up */
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reg = readl(MCHBAR_REG(BIOS_RESET_CPL));
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if (reg == 0xffffffff) {
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/* P-unit not found */
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debug("Punit MMIO not available\n");
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return -ENOENT;
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}
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/* Set Punit interrupt pin IPIN offset 3D */
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dm_pci_write_config8(dev, PCI_INTERRUPT_PIN, 0x2);
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/* Set PUINT IRQ to 24 and INTPIN LOCK */
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writel(PUINT_THERMAL_DEVICE_IRQ_VEC_NUMBER |
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PUINT_THERMAL_DEVICE_IRQ_LOCK,
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MCHBAR_REG(PUNIT_THERMAL_DEVICE_IRQ));
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/* Stage0 BIOS Reset Complete (RST_CPL) */
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enable_bios_reset_cpl();
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/*
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* Poll for bit 8 to check if PCODE has completed its action in response
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* to BIOS Reset complete. We wait here till 1 ms for the bit to get
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* set.
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*/
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start = get_timer(0);
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while (!(readl(MCHBAR_REG(BIOS_RESET_CPL)) & PCODE_INIT_DONE)) {
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if (get_timer(start) > 1) {
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debug("PCODE Init Done timeout\n");
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return -ETIMEDOUT;
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}
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udelay(100);
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}
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debug("PUNIT init complete\n");
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return 0;
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}
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static int apl_punit_probe(struct udevice *dev)
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{
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if (spl_phase() == PHASE_SPL)
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return punit_init(dev);
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return 0;
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}
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static const struct udevice_id apl_syscon_ids[] = {
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{ .compatible = "intel,apl-punit", .data = X86_SYSCON_PUNIT },
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{ }
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};
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U_BOOT_DRIVER(intel_apl_punit) = {
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.name = "intel_apl_punit",
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.id = UCLASS_SYSCON,
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.of_match = apl_syscon_ids,
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.probe = apl_punit_probe,
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DM_HEADER(<asm/cpu.h>) /* for X86_SYSCON_PUNIT */
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};
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