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370746ada7
At present there are require a few devices in the devicetree which are not actually used in SPL. This will cause problems with the new of-platdata, since it will try to instantiate devices which are not compiled into U-Boot. Update the devicetree to remove these devices from SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
98 lines
1.6 KiB
Plaintext
98 lines
1.6 KiB
Plaintext
/dts-v1/;
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#include <config.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "sandbox";
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compatible = "sandbox";
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aliases {
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i2c0 = &i2c_0;
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pci0 = &pcic;
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rtc0 = &rtc_0;
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axi0 = &axi;
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spi0 = &spi;
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};
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memory {
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reg = <0 CONFIG_SYS_SDRAM_SIZE>;
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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reservation_test0 {
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size = <0x4000>;
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alignment = <0x2000>;
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};
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reservation_test1: restest@a000 {
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reg = <0x00d0a000 0x2000>;
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};
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reservation_test2: restest@7000 {
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reg = <0x00d07000 0x1000>;
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};
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};
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cros_ec: cros-ec {
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reg = <0 0>;
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u-boot,dm-pre-proper;
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compatible = "google,cros-ec-sandbox";
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};
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dsi_host: dsi_host {
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compatible = "sandbox,dsi-host";
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status = "okay";
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};
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ethrawbus {
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compatible = "sandbox,eth-raw-bus";
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skip-localhost = <0>;
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};
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eth@10002000 {
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compatible = "sandbox,eth";
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reg = <0x10002000 0x1000>;
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fake-host-hwaddr = [00 00 66 44 22 00];
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};
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i2c_0: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0 0>;
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compatible = "sandbox,i2c";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0>;
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u-boot,dm-pre-reloc;
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};
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pcic: pci@0 {
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compatible = "sandbox,pci";
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device_type = "pci";
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bus-range = <0x00 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000
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0x01000000 0 0x20000000 0x20000000 0 0x2000>;
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};
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spi: spi@0 {
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u-boot,dm-pre-proper;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0 0>;
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compatible = "sandbox,spi";
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cs-gpios = <0>, <&gpio_a 0>;
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};
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};
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#include "sandbox.dtsi"
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#include "cros-ec-keyboard.dtsi"
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#include "sandbox_pmic.dtsi"
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