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	The device tree source files of at91sam9x5ek board are copied from the Linux v4.10, do the changes below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property to determine which nodes are used by the board_init_f stage. - Change the compatible of the spi flash to "spi-flash". - Add the spi0 aliases. - Fix the compilation warnings. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
		
			
				
	
	
		
			72 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
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			72 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| /*
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|  * at91sam9x5_can.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
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|  * Ethernet interface.
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|  *
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|  * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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|  *
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|  * Licensed under GPLv2.
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|  */
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| 
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| #include <dt-bindings/pinctrl/at91.h>
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| #include <dt-bindings/interrupt-controller/irq.h>
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| 
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| / {
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| 	ahb {
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| 		apb {
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| 			pmc: pmc@fffffc00 {
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| 				periphck {
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| 					can0_clk: can0_clk@29 {
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| 						#clock-cells = <0>;
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| 						reg = <29>;
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| 					};
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| 
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| 					can1_clk: can1_clk@30 {
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| 						#clock-cells = <0>;
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| 						reg = <30>;
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| 					};
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| 				};
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| 			};
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| 
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| 			can0: can@f8000000 {
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| 				compatible = "atmel,at91sam9x5-can";
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| 				reg = <0xf8000000 0x300>;
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| 				interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>;
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| 				pinctrl-names = "default";
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| 				pinctrl-0 = <&pinctrl_can0_rx_tx>;
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| 				clocks = <&can0_clk>;
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| 				clock-names = "can_clk";
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| 				status = "disabled";
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| 			};
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| 
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| 			can1: can@f8004000 {
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| 				compatible = "atmel,at91sam9x5-can";
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| 				reg = <0xf8004000 0x300>;
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| 				interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
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| 				pinctrl-names = "default";
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| 				pinctrl-0 = <&pinctrl_can1_rx_tx>;
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| 				clocks = <&can1_clk>;
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| 				clock-names = "can_clk";
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| 				status = "disabled";
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| 			};
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| 
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| 			pinctrl@fffff400 {
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| 				can0 {
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| 					pinctrl_can0_rx_tx: can0_rx_tx {
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| 						atmel,pins =
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| 							<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE	/* CANRX0, conflicts with DRXD */
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| 							AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* CANTX0, conflicts with DTXD */
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| 					};
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| 				};
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| 
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| 				can1 {
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| 					pinctrl_can1_rx_tx: can1_rx_tx {
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| 						atmel,pins =
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| 							<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE	/* CANRX1, conflicts with RXD1 */
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| 							AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* CANTX1, conflicts with TXD1 */
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| 					};
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| 				};
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| 			};
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| 		};
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| 	};
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| };
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