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5e6c069b2c
Add a driver for the Intel XWAY GbE PHY: - configure RGMII using dt phy-mode and standard delay properties - use genphy_config Signed-off-by: Tim Harvey <tharvey@gateworks.com>
49 lines
1.2 KiB
C
49 lines
1.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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#include <common.h>
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#include <phy.h>
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#include <linux/bitfield.h>
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#define XWAY_MDIO_MIICTRL 0x17 /* mii control */
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#define XWAY_MDIO_MIICTRL_RXSKEW_MASK GENMASK(14, 12)
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#define XWAY_MDIO_MIICTRL_TXSKEW_MASK GENMASK(10, 8)
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static int xway_config(struct phy_device *phydev)
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{
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ofnode node = phy_get_ofnode(phydev);
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u32 val = 0;
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if (ofnode_valid(node)) {
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u32 rx_delay, tx_delay;
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rx_delay = ofnode_read_u32_default(node, "rx-internal-delay-ps", 2000);
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tx_delay = ofnode_read_u32_default(node, "tx-internal-delay-ps", 2000);
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val |= FIELD_PREP(XWAY_MDIO_MIICTRL_TXSKEW_MASK, rx_delay / 500);
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val |= FIELD_PREP(XWAY_MDIO_MIICTRL_RXSKEW_MASK, tx_delay / 500);
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phy_modify(phydev, MDIO_DEVAD_NONE, XWAY_MDIO_MIICTRL,
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XWAY_MDIO_MIICTRL_TXSKEW_MASK |
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XWAY_MDIO_MIICTRL_RXSKEW_MASK, val);
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}
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genphy_config_aneg(phydev);
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return 0;
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}
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static struct phy_driver XWAY_driver = {
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.name = "XWAY",
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.uid = 0xD565A400,
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.mask = 0xffffff00,
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.features = PHY_GBIT_FEATURES,
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.config = xway_config,
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.startup = genphy_startup,
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.shutdown = genphy_shutdown,
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};
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int phy_xway_init(void)
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{
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phy_register(&XWAY_driver);
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return 0;
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}
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