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e782102319
Support is added for 5 new Qualcomm SoCs: * QCM2290 and SM6115 are low and mid range SoCs used on the RB1 and RB2 respectively. SM6115 is also used in some mid-range smartphones/tablets. Initial support includes buttons and USB (host and gadget). * SM8250 is a flagship SoC from 2020 used on the RB5, as well as many flagship smartphones. The board can boot to a U-Boot prompt, but is missing regulators necessary for USB support. * SM8550, and SM8650 are flagship mobile SoCs from 2023 and 2024 respectively. Found on many high end smartphones. In addition: * Support is added for the Schneider HMIBSC board. * mach-snapdragon switches to OF_UPSTREAM * IPQ40xx gets several regressions fixed and some overall cleanup. * The MSM serial driver gains the ability to generate the bit-clock automatically, no longer relying on a custom DT property. * The Qualcomm SMMU driver gets a generic compatible (so per-SoC compatibles don't need to be added). * Support for the GENI I2C controller is added. * The qcom SPMI driver has SPMI v5 support fixed, and v7 support added. * The qcom sdhci driver gets some fixes for SDCC v5 support. * SDM845 gains sdcard support * Support is added for the Synopsys eUSB2 PHY driver (used on SM8550 and SM8650) * SYS_INIT_SP_BSS_OFFSET is set to 1.5M to give us more space for FDTs. * RB2 gets a work-around to fix the USB dr_mode property before booting Linux.
75 lines
1.6 KiB
C
75 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Qualcomm sm8650 pinctrl
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*
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* (C) Copyright 2024 Linaro Ltd.
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*
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*/
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#include <dm.h>
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#include "pinctrl-qcom.h"
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#define MAX_PIN_NAME_LEN 32
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static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
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static const struct pinctrl_function msm_pinctrl_functions[] = {
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{"qup2_se7", 1},
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{"gpio", 0},
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};
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static const char *sm8650_get_function_name(struct udevice *dev,
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unsigned int selector)
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{
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return msm_pinctrl_functions[selector].name;
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}
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static const char *sm8650_get_pin_name(struct udevice *dev,
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unsigned int selector)
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{
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static const char *special_pins_names[] = {
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"ufs_reset",
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"sdc2_clk",
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"sdc2_cmd",
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"sdc2_data",
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};
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if (selector >= 210 && selector <= 213)
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snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 210]);
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else
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snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
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return pin_name;
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}
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static unsigned int sm8650_get_function_mux(__maybe_unused unsigned int pin,
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unsigned int selector)
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{
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return msm_pinctrl_functions[selector].val;
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}
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static struct msm_pinctrl_data sm8650_data = {
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.pin_data = {
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.pin_count = 214,
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.special_pins_start = 210,
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},
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.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
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.get_function_name = sm8650_get_function_name,
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.get_function_mux = sm8650_get_function_mux,
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.get_pin_name = sm8650_get_pin_name,
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};
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static const struct udevice_id msm_pinctrl_ids[] = {
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{ .compatible = "qcom,sm8650-tlmm", .data = (ulong)&sm8650_data },
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{ /* Sentinel */ }
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};
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U_BOOT_DRIVER(pinctrl_sm8650) = {
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.name = "pinctrl_sm8650",
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.id = UCLASS_NOP,
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.of_match = msm_pinctrl_ids,
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.ops = &msm_pinctrl_ops,
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.bind = msm_pinctrl_bind,
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};
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