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9cb6fb7e5b
This SoC features a pinctrl block with north, south, and west tiles accessible to the AP. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 lines
665 B
Makefile
16 lines
665 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (c) 2023 Linaro Ltd.
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obj-$(CONFIG_PINCTRL_QCOM) += pinctrl-qcom.o
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obj-$(CONFIG_PINCTRL_QCOM_APQ8016) += pinctrl-apq8016.o
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obj-$(CONFIG_PINCTRL_QCOM_IPQ4019) += pinctrl-ipq4019.o
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obj-$(CONFIG_PINCTRL_QCOM_APQ8096) += pinctrl-apq8096.o
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obj-$(CONFIG_PINCTRL_QCOM_QCM2290) += pinctrl-qcm2290.o
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obj-$(CONFIG_PINCTRL_QCOM_QCS404) += pinctrl-qcs404.o
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obj-$(CONFIG_PINCTRL_QCOM_SDM845) += pinctrl-sdm845.o
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obj-$(CONFIG_PINCTRL_QCOM_SM6115) += pinctrl-sm6115.o
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obj-$(CONFIG_PINCTRL_QCOM_SM8250) += pinctrl-sm8250.o
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obj-$(CONFIG_PINCTRL_QCOM_SM8550) += pinctrl-sm8550.o
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obj-$(CONFIG_PINCTRL_QCOM_SM8650) += pinctrl-sm8650.o
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