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c26fd49e90
Add the GCC and TCSRCC clock driver for the SM8650 SoC. The GCC driver uses the clk-qcom infrastructure to support GDSCs, Resets and gates. While the TCSRCC is a simpler clock driver which only supports gates. The GCC enable and set_rate callbacks contains some tweaks to setup clocks for Debug UART, SDCard controller and USB. The TCSRCC gates returns the XO frequency, which is used by the Synopsys eUSB2 driver to determine the PHY configuration. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 lines
577 B
Makefile
16 lines
577 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# (C) Copyright 2023 Linaro
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obj-y += clock-qcom.o
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obj-$(CONFIG_CLK_QCOM_SDM845) += clock-sdm845.o
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obj-$(CONFIG_CLK_QCOM_APQ8016) += clock-apq8016.o
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obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o
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obj-$(CONFIG_CLK_QCOM_IPQ4019) += clock-ipq4019.o
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obj-$(CONFIG_CLK_QCOM_QCM2290) += clock-qcm2290.o
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obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o
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obj-$(CONFIG_CLK_QCOM_SM6115) += clock-sm6115.o
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obj-$(CONFIG_CLK_QCOM_SM8250) += clock-sm8250.o
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obj-$(CONFIG_CLK_QCOM_SM8550) += clock-sm8550.o
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obj-$(CONFIG_CLK_QCOM_SM8650) += clock-sm8650.o
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