mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2025-08-19 05:31:31 +02:00
61ff13283c
Use the new device devicetree files in dts/upstream/ and delete the old ones. Still keep the -u-boot.dtsi with all u-boot specifics around. There is one catch and that is fsl-ls1028a-kontron-sl28-var3.dts which is not available upstream (yet!). For now, the base dts is used for this variant as this only differ in the compatible and the (human readable) model name. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Peng Fan <peng.fan@nxp.com>
122 lines
2.6 KiB
C
122 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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#include <common.h>
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#include <asm/io.h>
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#include <asm/spl.h>
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#include <asm/arch-fsl-layerscape/fsl_serdes.h>
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#include <asm/arch-fsl-layerscape/soc.h>
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#include <spi_flash.h>
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#include "sl28.h"
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#define DCFG_RCWSR25 0x160
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#define GPINFO_HW_VARIANT_MASK 0xff
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#define SERDES_LNDGCR0 0x1ea08c0
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#define LNDGCR0_PROTS_MASK GENMASK(11, 7)
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#define LNDGCR0_PROTS_SATA (0x2 << 7)
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#define SERDES_LNDGCR1 0x1ea08c4
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#define LNDGCR1_RDAT_INV BIT(31)
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/*
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* On this board the SMARC PCIe lane D might be switched to SATA mode. This
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* makes sense if this lane is connected to a Mini PCI slot and a mSATA card
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* is plugged in. In this case, the RX pair is swapped and we need to invert
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* the received data.
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*/
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static void fixup_sata_rx_polarity(void)
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{
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u32 prot = in_le32(SERDES_LNDGCR0) & LNDGCR0_PROTS_MASK;
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u32 tmp;
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if (prot == LNDGCR0_PROTS_SATA) {
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tmp = in_le32(SERDES_LNDGCR1);
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tmp |= LNDGCR1_RDAT_INV;
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out_le32(SERDES_LNDGCR1, tmp);
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}
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}
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int sl28_variant(void)
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{
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return in_le32(DCFG_BASE + DCFG_RCWSR25) & GPINFO_HW_VARIANT_MASK;
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}
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int board_fit_config_name_match(const char *name)
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{
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int variant = sl28_variant();
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switch (variant) {
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case 1:
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return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var1");
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case 2:
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return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var2");
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case 4:
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return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var4");
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case 3:
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default:
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return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28");
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}
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}
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void board_boot_order(u32 *spl_boot_list)
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{
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enum boot_source src = sl28_boot_source();
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switch (src) {
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case BOOT_SOURCE_SDHC:
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spl_boot_list[0] = BOOT_DEVICE_MMC2;
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break;
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case BOOT_SOURCE_SPI:
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case BOOT_SOURCE_I2C:
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spl_boot_list[0] = BOOT_DEVICE_SPI;
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break;
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case BOOT_SOURCE_MMC:
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spl_boot_list[0] = BOOT_DEVICE_MMC1;
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break;
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default:
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panic("unexpected bootsource (%d)\n", src);
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break;
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}
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}
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unsigned int spl_spi_get_uboot_offs(struct spi_flash *flash)
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{
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enum boot_source src = sl28_boot_source();
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switch (src) {
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case BOOT_SOURCE_SPI:
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return 0x000000;
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case BOOT_SOURCE_I2C:
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return 0x230000;
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default:
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panic("unexpected bootsource (%d)\n", src);
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break;
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}
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}
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const char *spl_board_loader_name(u32 boot_device)
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{
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enum boot_source src = sl28_boot_source();
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switch (src) {
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case BOOT_SOURCE_SDHC:
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return "SD card (Test mode)";
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case BOOT_SOURCE_SPI:
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return "Failsafe SPI flash";
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case BOOT_SOURCE_I2C:
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return "SPI flash";
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case BOOT_SOURCE_MMC:
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return "eMMC";
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default:
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return "(unknown)";
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}
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}
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int board_early_init_f(void)
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{
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fixup_sata_rx_polarity();
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fsl_lsch3_early_init_f();
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return 0;
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}
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