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f1e6a718eb
Current sunxi DRAM initialisation code does several test accesses to the DRAM array to detect aliasing effects and so determine the correct row/column configuration. This changes the DRAM content, which breaks use cases like soft reset and Linux's ramoops mechanism. Fix this problem by saving and restoring the content of the DRAM cells that is used for the test writes. Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
65 lines
1.4 KiB
C
65 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* DRAM init helper functions
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*
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* (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
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*/
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#include <config.h>
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#include <time.h>
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#include <vsprintf.h>
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#include <asm/barriers.h>
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#include <asm/io.h>
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#include <asm/arch/dram.h>
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/*
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* Wait up to 1s for value to be set in given part of reg.
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*/
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void mctl_await_completion(u32 *reg, u32 mask, u32 val)
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{
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unsigned long tmo = timer_get_us() + 1000000;
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while ((readl(reg) & mask) != val) {
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if (timer_get_us() > tmo)
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panic("Timeout initialising DRAM\n");
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}
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}
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/*
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* Test if memory at offset matches memory at a certain base
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*
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* Note: dsb() is not available on ARMv5 in Thumb mode
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*/
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#ifndef CONFIG_MACH_SUNIV
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bool mctl_mem_matches_base(u32 offset, ulong base)
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{
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u32 val_base;
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u32 val_offset;
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bool ret;
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/* Save original values */
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val_base = readl(base);
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val_offset = readl(base + offset);
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/* Try to write different values to RAM at two addresses */
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writel(0, base);
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writel(0xaa55aa55, base + offset);
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dsb();
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/* Check if the same value is actually observed when reading back */
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ret = readl(base) == readl(base + offset);
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/* Restore original values */
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writel(val_base, base);
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writel(val_offset, base + offset);
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return ret;
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}
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/*
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* Test if memory at offset matches memory at begin of DRAM
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*/
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bool mctl_mem_matches(u32 offset)
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{
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return mctl_mem_matches_base(offset, CFG_SYS_SDRAM_BASE);
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}
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#endif
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