mirror of
				https://source.denx.de/u-boot/u-boot.git
				synced 2025-11-03 18:01:41 +01:00 
			
		
		
		
	Sync the device tree and dt-bindings from Linux v5.7-rc1 8f3d9f354286
("Linux 5.7-rc1").
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
		
	
			
		
			
				
	
	
		
			152 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			152 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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 * GXBB clock tree IDs
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 */
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#ifndef __GXBB_CLKC_H
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#define __GXBB_CLKC_H
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#define CLKID_SYS_PLL		0
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#define CLKID_HDMI_PLL		2
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#define CLKID_FIXED_PLL		3
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#define CLKID_FCLK_DIV2		4
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#define CLKID_FCLK_DIV3		5
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#define CLKID_FCLK_DIV4		6
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#define CLKID_FCLK_DIV5		7
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#define CLKID_FCLK_DIV7		8
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#define CLKID_GP0_PLL		9
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#define CLKID_CLK81		12
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#define CLKID_MPLL0		13
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#define CLKID_MPLL1		14
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#define CLKID_MPLL2		15
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#define CLKID_DDR		16
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#define CLKID_DOS		17
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#define CLKID_ISA		18
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#define CLKID_PL301		19
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#define CLKID_PERIPHS		20
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#define CLKID_SPICC		21
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#define CLKID_I2C		22
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#define CLKID_SAR_ADC		23
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#define CLKID_SMART_CARD	24
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#define CLKID_RNG0		25
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#define CLKID_UART0		26
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#define CLKID_SDHC		27
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#define CLKID_STREAM		28
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#define CLKID_ASYNC_FIFO	29
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#define CLKID_SDIO		30
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#define CLKID_ABUF		31
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#define CLKID_HIU_IFACE		32
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#define CLKID_ASSIST_MISC	33
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#define CLKID_SPI		34
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#define CLKID_ETH		36
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#define CLKID_I2S_SPDIF		35
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#define CLKID_DEMUX		37
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#define CLKID_AIU_GLUE		38
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#define CLKID_IEC958		39
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#define CLKID_I2S_OUT		40
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#define CLKID_AMCLK		41
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#define CLKID_AIFIFO2		42
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#define CLKID_MIXER		43
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#define CLKID_MIXER_IFACE	44
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#define CLKID_ADC		45
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#define CLKID_BLKMV		46
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#define CLKID_AIU		47
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#define CLKID_UART1		48
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#define CLKID_G2D		49
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#define CLKID_USB0		50
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#define CLKID_USB1		51
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#define CLKID_RESET		52
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#define CLKID_NAND		53
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#define CLKID_DOS_PARSER	54
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#define CLKID_USB		55
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#define CLKID_VDIN1		56
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#define CLKID_AHB_ARB0		57
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#define CLKID_EFUSE		58
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#define CLKID_BOOT_ROM		59
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#define CLKID_AHB_DATA_BUS	60
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#define CLKID_AHB_CTRL_BUS	61
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#define CLKID_HDMI_INTR_SYNC	62
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#define CLKID_HDMI_PCLK		63
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#define CLKID_USB1_DDR_BRIDGE	64
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#define CLKID_USB0_DDR_BRIDGE	65
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#define CLKID_MMC_PCLK		66
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#define CLKID_DVIN		67
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#define CLKID_UART2		68
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#define CLKID_SANA		69
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#define CLKID_VPU_INTR		70
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#define CLKID_SEC_AHB_AHB3_BRIDGE 71
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#define CLKID_CLK81_A53		72
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#define CLKID_VCLK2_VENCI0	73
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#define CLKID_VCLK2_VENCI1	74
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#define CLKID_VCLK2_VENCP0	75
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#define CLKID_VCLK2_VENCP1	76
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#define CLKID_GCLK_VENCI_INT0	77
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#define CLKID_GCLK_VENCI_INT	78
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#define CLKID_DAC_CLK		79
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#define CLKID_AOCLK_GATE	80
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#define CLKID_IEC958_GATE	81
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#define CLKID_ENC480P		82
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#define CLKID_RNG1		83
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#define CLKID_GCLK_VENCI_INT1	84
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#define CLKID_VCLK2_VENCLMCC	85
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#define CLKID_VCLK2_VENCL	86
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#define CLKID_VCLK_OTHER	87
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#define CLKID_EDP		88
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#define CLKID_AO_MEDIA_CPU	89
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#define CLKID_AO_AHB_SRAM	90
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#define CLKID_AO_AHB_BUS	91
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#define CLKID_AO_IFACE		92
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#define CLKID_AO_I2C		93
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#define CLKID_SD_EMMC_A		94
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#define CLKID_SD_EMMC_B		95
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#define CLKID_SD_EMMC_C		96
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#define CLKID_SAR_ADC_CLK	97
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#define CLKID_SAR_ADC_SEL	98
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#define CLKID_MALI_0_SEL	100
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#define CLKID_MALI_0		102
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#define CLKID_MALI_1_SEL	103
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#define CLKID_MALI_1		105
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#define CLKID_MALI		106
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#define CLKID_CTS_AMCLK		107
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#define CLKID_CTS_MCLK_I958	110
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#define CLKID_CTS_I958		113
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#define CLKID_32K_CLK		114
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#define CLKID_SD_EMMC_A_CLK0	119
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#define CLKID_SD_EMMC_B_CLK0	122
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#define CLKID_SD_EMMC_C_CLK0	125
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#define CLKID_VPU_0_SEL		126
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#define CLKID_VPU_0		128
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#define CLKID_VPU_1_SEL		129
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#define CLKID_VPU_1		131
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#define CLKID_VPU		132
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#define CLKID_VAPB_0_SEL	133
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#define CLKID_VAPB_0		135
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#define CLKID_VAPB_1_SEL	136
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#define CLKID_VAPB_1		138
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#define CLKID_VAPB_SEL		139
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#define CLKID_VAPB		140
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#define CLKID_VDEC_1		153
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#define CLKID_VDEC_HEVC		156
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#define CLKID_GEN_CLK		159
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#define CLKID_VID_PLL		166
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#define CLKID_VCLK		175
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#define CLKID_VCLK2		176
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#define CLKID_VCLK_DIV1		185
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#define CLKID_VCLK_DIV2		186
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#define CLKID_VCLK_DIV4		187
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#define CLKID_VCLK_DIV6		188
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#define CLKID_VCLK_DIV12	189
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#define CLKID_VCLK2_DIV1	190
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#define CLKID_VCLK2_DIV2	191
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#define CLKID_VCLK2_DIV4	192
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#define CLKID_VCLK2_DIV6	193
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#define CLKID_VCLK2_DIV12	194
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#define CLKID_CTS_ENCI		199
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#define CLKID_CTS_ENCP		200
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#define CLKID_CTS_VDAC		201
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#define CLKID_HDMI_TX		202
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#define CLKID_HDMI		205
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#define CLKID_ACODEC		206
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#endif /* __GXBB_CLKC_H */
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