York Sun ef00227551 powerpc/mpc8xxx: Allow board file to override DDR address assignment ...

This gives boards flexibility to assign other than default addresses to each
DDR controller. For example, DDR controler 2 can have 0 as the base and DDR
controller 1 has higher memory.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

2013-05-14 16:13:25 -05:00

..

common_timing_params.h

powerpc/8xxx: Enable DDR3 RDIMM support

2010-07-26 13:16:10 -05:00

ctrl_regs.c

mpc8xxx: fix DDR init value to use CONFIG_MEM_INIT_VALUE

2013-01-30 11:25:15 -06:00

ddr1_dimm_params.c

GCC4.6: Squash warnings in ddr[123]_dimm_params.c

2011-10-27 23:54:00 +02:00

ddr2_dimm_params.c

GCC4.6: Squash warnings in ddr[123]_dimm_params.c

2011-10-27 23:54:00 +02:00

ddr3_dimm_params.c

powerpc/mpc8xxx: Add fine timing support for DDR3

2012-08-23 12:16:55 -05:00

ddr.h

powerpc/mpc8xxxx: FSL DDR debugger auto run of stored commands

2013-01-30 11:25:14 -06:00

interactive.c

powerpc/mpc8xxxx: FSL DDR debugger auto run of stored commands

2013-01-30 11:25:14 -06:00

lc_common_dimm_params.c

arch/powerpc/cpu/mpc8xxx/: sparse fixes

2012-11-04 11:00:36 -07:00

main.c

powerpc/mpc8xxx: Allow board file to override DDR address assignment

2013-05-14 16:13:25 -05:00

Makefile

powerpc/8xxx: Add support for interactive DDR programming interface

2011-10-09 17:57:53 -05:00

options.c

powerpc/mpc8xxx: Add auto select bank interleaving mode

2012-10-22 14:31:30 -05:00

util.c

8xxx: Change all 8*xx_DDR addresses to 8xxx

2012-11-27 17:45:17 -06:00