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	I can't find anywhere in the datasheet that says the status register needs 3 dummy bytes sent to it before being able to read back the first real result. Tests on a Blackfin board show that after writing the opcode, the status register starts coming back immediately. So only write out the read status register opcode before polling the result. Signed-off-by: Mike Frysinger <vapier@gentoo.org> CC: Jason McMullan <mcmullan@netapp.com> CC: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
		
			
				
	
	
		
			351 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			351 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * (C) Copyright 2000-2002
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 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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 *
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 * Copyright 2008, Network Appliance Inc.
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 * Jason McMullan <mcmullan@netapp.com>
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 *
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 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
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 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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 *
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 * See file CREDITS for list of people who contributed to this
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 * project.
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License as
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 * published by the Free Software Foundation; either version 2 of
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 * the License, or (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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 * MA 02111-1307 USA
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 */
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#include <common.h>
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#include <malloc.h>
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#include <spi_flash.h>
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#include "spi_flash_internal.h"
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/* M25Pxx-specific commands */
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#define CMD_M25PXX_WREN		0x06	/* Write Enable */
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#define CMD_M25PXX_WRDI		0x04	/* Write Disable */
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#define CMD_M25PXX_RDSR		0x05	/* Read Status Register */
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#define CMD_M25PXX_WRSR		0x01	/* Write Status Register */
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#define CMD_M25PXX_READ		0x03	/* Read Data Bytes */
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#define CMD_M25PXX_FAST_READ	0x0b	/* Read Data Bytes at Higher Speed */
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#define CMD_M25PXX_PP		0x02	/* Page Program */
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#define CMD_M25PXX_SE		0xd8	/* Sector Erase */
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#define CMD_M25PXX_BE		0xc7	/* Bulk Erase */
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#define CMD_M25PXX_DP		0xb9	/* Deep Power-down */
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#define CMD_M25PXX_RES		0xab	/* Release from DP, and Read Signature */
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#define STM_ID_M25P16		0x15
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#define STM_ID_M25P20		0x12
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#define STM_ID_M25P32		0x16
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#define STM_ID_M25P40		0x13
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#define STM_ID_M25P64		0x17
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#define STM_ID_M25P80		0x14
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#define STM_ID_M25P128		0x18
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#define STMICRO_SR_WIP		(1 << 0)	/* Write-in-Progress */
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struct stmicro_spi_flash_params {
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	u8 idcode1;
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	u16 page_size;
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	u16 pages_per_sector;
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	u16 nr_sectors;
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	const char *name;
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};
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/* spi_flash needs to be first so upper layers can free() it */
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struct stmicro_spi_flash {
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	struct spi_flash flash;
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	const struct stmicro_spi_flash_params *params;
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};
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static inline struct stmicro_spi_flash *to_stmicro_spi_flash(struct spi_flash
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							     *flash)
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{
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	return container_of(flash, struct stmicro_spi_flash, flash);
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}
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static const struct stmicro_spi_flash_params stmicro_spi_flash_table[] = {
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	{
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		.idcode1 = STM_ID_M25P16,
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		.page_size = 256,
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		.pages_per_sector = 256,
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		.nr_sectors = 32,
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		.name = "M25P16",
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	},
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	{
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		.idcode1 = STM_ID_M25P20,
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		.page_size = 256,
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		.pages_per_sector = 256,
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		.nr_sectors = 4,
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		.name = "M25P20",
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	},
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	{
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		.idcode1 = STM_ID_M25P32,
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		.page_size = 256,
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		.pages_per_sector = 256,
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		.nr_sectors = 64,
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		.name = "M25P32",
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	},
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	{
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		.idcode1 = STM_ID_M25P40,
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		.page_size = 256,
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		.pages_per_sector = 256,
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		.nr_sectors = 8,
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		.name = "M25P40",
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	},
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	{
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		.idcode1 = STM_ID_M25P64,
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		.page_size = 256,
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		.pages_per_sector = 256,
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		.nr_sectors = 128,
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		.name = "M25P64",
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	},
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	{
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		.idcode1 = STM_ID_M25P80,
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		.page_size = 256,
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		.pages_per_sector = 256,
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		.nr_sectors = 16,
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		.name = "M25P80",
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	},
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	{
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		.idcode1 = STM_ID_M25P128,
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		.page_size = 256,
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		.pages_per_sector = 1024,
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		.nr_sectors = 64,
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		.name = "M25P128",
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	},
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};
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static int stmicro_wait_ready(struct spi_flash *flash, unsigned long timeout)
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{
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	struct spi_slave *spi = flash->spi;
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	unsigned long timebase;
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	int ret;
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	u8 cmd = CMD_M25PXX_RDSR;
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	u8 status;
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	ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
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	if (ret) {
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		debug("SF: Failed to send command %02x: %d\n", cmd, ret);
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		return ret;
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	}
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	timebase = get_timer(0);
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	do {
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		ret = spi_xfer(spi, 8, NULL, &status, 0);
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		if (ret)
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			return -1;
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		if ((status & STMICRO_SR_WIP) == 0)
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			break;
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	} while (get_timer(timebase) < timeout);
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	spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
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	if ((status & STMICRO_SR_WIP) == 0)
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		return 0;
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	/* Timed out */
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	return -1;
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}
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static int stmicro_read_fast(struct spi_flash *flash,
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			     u32 offset, size_t len, void *buf)
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{
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	struct stmicro_spi_flash *stm = to_stmicro_spi_flash(flash);
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	unsigned long page_addr;
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	unsigned long page_size;
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	u8 cmd[5];
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	page_size = stm->params->page_size;
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	page_addr = offset / page_size;
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	cmd[0] = CMD_READ_ARRAY_FAST;
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	cmd[1] = page_addr >> 8;
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	cmd[2] = page_addr;
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	cmd[3] = offset % page_size;
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	cmd[4] = 0x00;
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	return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len);
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}
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static int stmicro_write(struct spi_flash *flash,
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			 u32 offset, size_t len, const void *buf)
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{
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	struct stmicro_spi_flash *stm = to_stmicro_spi_flash(flash);
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	unsigned long page_addr;
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	unsigned long byte_addr;
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	unsigned long page_size;
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	size_t chunk_len;
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	size_t actual;
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	int ret;
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	u8 cmd[4];
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	page_size = stm->params->page_size;
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	page_addr = offset / page_size;
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	byte_addr = offset % page_size;
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	ret = spi_claim_bus(flash->spi);
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	if (ret) {
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		debug("SF: Unable to claim SPI bus\n");
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		return ret;
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	}
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	ret = 0;
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	for (actual = 0; actual < len; actual += chunk_len) {
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		chunk_len = min(len - actual, page_size - byte_addr);
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		cmd[0] = CMD_M25PXX_PP;
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		cmd[1] = page_addr >> 8;
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		cmd[2] = page_addr;
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		cmd[3] = byte_addr;
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		debug
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		    ("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %d\n",
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		     buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
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		ret = spi_flash_cmd(flash->spi, CMD_M25PXX_WREN, NULL, 0);
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		if (ret < 0) {
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			debug("SF: Enabling Write failed\n");
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			break;
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		}
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		ret = spi_flash_cmd_write(flash->spi, cmd, 4,
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					  buf + actual, chunk_len);
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		if (ret < 0) {
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			debug("SF: STMicro Page Program failed\n");
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			break;
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		}
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		ret = stmicro_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
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		if (ret < 0) {
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			debug("SF: STMicro page programming timed out\n");
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			break;
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		}
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		page_addr++;
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		byte_addr = 0;
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	}
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	debug("SF: STMicro: Successfully programmed %u bytes @ 0x%x\n",
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	      len, offset);
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	spi_release_bus(flash->spi);
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	return ret;
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}
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int stmicro_erase(struct spi_flash *flash, u32 offset, size_t len)
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{
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	struct stmicro_spi_flash *stm = to_stmicro_spi_flash(flash);
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	unsigned long sector_size;
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	size_t actual;
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	int ret;
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	u8 cmd[4];
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	/*
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	 * This function currently uses sector erase only.
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	 * probably speed things up by using bulk erase
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	 * when possible.
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	 */
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	sector_size = stm->params->page_size * stm->params->pages_per_sector;
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	if (offset % sector_size || len % sector_size) {
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		debug("SF: Erase offset/length not multiple of sector size\n");
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		return -1;
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	}
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	len /= sector_size;
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	cmd[0] = CMD_M25PXX_SE;
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	cmd[2] = 0x00;
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	cmd[3] = 0x00;
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	ret = spi_claim_bus(flash->spi);
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	if (ret) {
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		debug("SF: Unable to claim SPI bus\n");
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		return ret;
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	}
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	ret = 0;
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	for (actual = 0; actual < len; actual++) {
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		cmd[1] = (offset / sector_size) + actual;
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		ret = spi_flash_cmd(flash->spi, CMD_M25PXX_WREN, NULL, 0);
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		if (ret < 0) {
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			debug("SF: Enabling Write failed\n");
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			break;
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		}
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		ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0);
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		if (ret < 0) {
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			debug("SF: STMicro page erase failed\n");
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			break;
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		}
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		ret = stmicro_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
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		if (ret < 0) {
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			debug("SF: STMicro page erase timed out\n");
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			break;
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		}
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	}
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	debug("SF: STMicro: Successfully erased %u bytes @ 0x%x\n",
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	      len * sector_size, offset);
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	spi_release_bus(flash->spi);
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	return ret;
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}
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struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 * idcode)
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{
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	const struct stmicro_spi_flash_params *params;
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	struct stmicro_spi_flash *stm;
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	unsigned int i;
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	for (i = 0; i < ARRAY_SIZE(stmicro_spi_flash_table); i++) {
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		params = &stmicro_spi_flash_table[i];
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		if (params->idcode1 == idcode[2]) {
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			break;
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		}
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	}
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	if (i == ARRAY_SIZE(stmicro_spi_flash_table)) {
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		debug("SF: Unsupported STMicro ID %02x\n", idcode[1]);
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		return NULL;
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	}
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	stm = malloc(sizeof(struct stmicro_spi_flash));
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	if (!stm) {
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		debug("SF: Failed to allocate memory\n");
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		return NULL;
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	}
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	stm->params = params;
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	stm->flash.spi = spi;
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	stm->flash.name = params->name;
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	stm->flash.write = stmicro_write;
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	stm->flash.erase = stmicro_erase;
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	stm->flash.read = stmicro_read_fast;
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	stm->flash.size = params->page_size * params->pages_per_sector
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	    * params->nr_sectors;
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	debug("SF: Detected %s with page size %u, total %u bytes\n",
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	      params->name, params->page_size, stm->flash.size);
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	return &stm->flash;
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}
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