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	This patch adds support for the Samsung s5pc100 and s5pc110 SoCs. The s5pc1xx SoC is an ARM Cortex A8 processor. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
		
			
				
	
	
		
			44 lines
		
	
	
		
			1.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			44 lines
		
	
	
		
			1.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2009 Samsung Electronics
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|  * Minkyu Kang <mk7.kang@samsung.com>
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|  *
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|  * See file CREDITS for list of people who contributed to this
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|  * project.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  */
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| 
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| #include <common.h>
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| #include <asm/cache.h>
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| 
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| void l2_cache_enable(void)
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| {
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| 	unsigned long i;
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| 
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| 	__asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(i));
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| 	__asm__ __volatile__("orr %0, %0, #0x2":"=r"(i));
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| 	__asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r"(i));
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| }
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| 
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| void l2_cache_disable(void)
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| {
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| 	unsigned long i;
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| 
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| 	__asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(i));
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| 	__asm__ __volatile__("bic %0, %0, #0x2":"=r"(i));
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| 	__asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r"(i));
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| }
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