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fde7702c9b
Ratified on Apr. 2024, the original RISC-V "A" extension is now split
into two separate extensions, "Zaamo" for atomic operations and "Zalrsc"
for load-reserved/store-conditional instructions.
For now, we've already seen real-world designs implement the Zalrsc
extension only[2]. As U-Boot mainly runs with only one HART, we could
easily support these designs by not using AMO instructions in the
hard-written assembly if necessary, for which this patch introduces two
new Kconfig options to indicate the availability of "Zaamo" and "Zalrsc".
Note that even with this patch, "A" extension is specified in the ISA
string passed to the compiler as long as one of "Zaamo" or "Zalrsc" is
available, since they're only recognized with a quite recent version of
GCC/Clang. The compiler usually doesn't automatically generate atomic
instructions unless the source explicitly instructs it to do so, thus
this should be safe.
Link: d94c64c63e # [1]
Link: https://lore.kernel.org/u-boot/20250729162035.209849-9-uros.stajic@htecgroup.com/ # [2]
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
68 lines
1.8 KiB
Makefile
68 lines
1.8 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2017 Andes Technology Corporation.
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# Rick Chen, Andes Technology Corporation <rick@andestech.com>
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ifeq ($(CONFIG_ARCH_RV64I),y)
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ARCH_BASE = rv64im
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ABI_BASE = lp64
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endif
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ifeq ($(CONFIG_ARCH_RV32I),y)
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ARCH_BASE = rv32im
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ABI_BASE = ilp32
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endif
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# GCC starts to recognize "Zaamo" and "Zalrsc" from version 15, which is quite
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# recent. We don't bother checking the exact compiler version, but pass "A"
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# extension for -march as long as one of "Zaamo" or "Zalrsc" is available.
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ifeq ($(findstring y,$(CONFIG_RISCV_ISA_A) \
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$(CONFIG_RISCV_ISA_ZAAMO) \
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$(CONFIG_RISCV_ISA_ZALRSC)),y)
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ARCH_A = a
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endif
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ifeq ($(CONFIG_RISCV_ISA_F),y)
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ARCH_F = f
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endif
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ifeq ($(CONFIG_RISCV_ISA_D),y)
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ARCH_D = d
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ABI_D = d
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endif
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ifeq ($(CONFIG_RISCV_ISA_C),y)
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ARCH_C = c
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endif
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ifeq ($(CONFIG_RISCV_ISA_ZBB),y)
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ARCH_ZBB = _zbb
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endif
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ifeq ($(CONFIG_CMODEL_MEDLOW),y)
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CMODEL = medlow
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endif
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ifeq ($(CONFIG_CMODEL_MEDANY),y)
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CMODEL = medany
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endif
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RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C)$(ARCH_ZBB)
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ABI = $(ABI_BASE)$(ABI_D)
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# Newer binutils versions default to ISA spec version 20191213 which moves some
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# instructions from the I extension to the Zicsr and Zifencei extensions.
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toolchain-need-zicsr-zifencei := $(call cc-option-yn, -mabi=$(ABI) -march=$(RISCV_MARCH)_zicsr_zifencei)
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ifeq ($(toolchain-need-zicsr-zifencei),y)
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RISCV_MARCH := $(RISCV_MARCH)_zicsr_zifencei
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endif
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ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \
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-mcmodel=$(CMODEL)
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ifeq ($(CONFIG_$(PHASE_)FRAMEPOINTER),y)
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ARCH_FLAGS += -fno-omit-frame-pointer
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endif
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PLATFORM_CPPFLAGS += $(ARCH_FLAGS)
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CFLAGS_EFI += $(ARCH_FLAGS)
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head-y := arch/riscv/cpu/start.o
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libs-y += arch/riscv/cpu/
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libs-y += arch/riscv/cpu/$(CPU)/
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libs-y += arch/riscv/lib/
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