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df1b721f60
Make the PMU LDO configuration interface available to board code, so that board code can reconfigure the internal LDOs of the SoC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Eric Nelson <eric@nelint.com>
42 lines
910 B
C
42 lines
910 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2009
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* Stefano Babic, DENX Software Engineering, sbabic@denx.de.
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*/
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#ifndef __SYS_PROTO_IMX6_
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#define __SYS_PROTO_IMX6_
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#include <asm/mach-imx/sys_proto.h>
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#include <asm/arch/iomux.h>
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#define USBPHY_PWD 0x00000000
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#define USBPHY_PWD_RXPWDRX (1 << 20) /* receiver block power down */
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#define is_usbotg_phy_active(void) (!(readl(USB_PHY0_BASE_ADDR + USBPHY_PWD) & \
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USBPHY_PWD_RXPWDRX))
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int imx6_pcie_toggle_power(void);
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int imx6_pcie_toggle_reset(void);
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enum ldo_reg {
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LDO_ARM,
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LDO_SOC,
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LDO_PU,
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};
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int set_ldo_voltage(enum ldo_reg ldo, u32 mv);
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/**
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* iomuxc_set_rgmii_io_voltage - set voltage level of RGMII/USB pins
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*
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* @param io_vol - the voltage IO level of pins
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*/
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static inline void iomuxc_set_rgmii_io_voltage(int io_vol)
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{
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__raw_writel(io_vol, IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE_RGMII);
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}
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#endif /* __SYS_PROTO_IMX6_ */
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