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7a6577fed4
Add iMX8ULP DDR initialization driver which loads the DDR timing parameters and executes the training procedure. When enabling IMX8ULP_DRAM_PHY_PLL_BYPASS, using PHY PLL bypass mode to do DDR init Signed-off-by: Ye Li <ye.li@nxp.com>
3 lines
80 B
Plaintext
3 lines
80 B
Plaintext
source "drivers/ddr/imx/imx8m/Kconfig"
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source "drivers/ddr/imx/imx8ulp/Kconfig"
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