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	Taking into account the Amlogic Family name starts with GX, including the GXBB, GXL and GXM SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
		
			
				
	
	
		
			131 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			131 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0+
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/*
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 * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
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 */
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#include <common.h>
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#include <linux/libfdt.h>
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#include <linux/err.h>
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#include <asm/arch/gx.h>
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#include <asm/arch/sm.h>
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#include <asm/armv8/mmu.h>
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#include <asm/unaligned.h>
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#include <linux/sizes.h>
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#include <efi_loader.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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	const fdt64_t *val;
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	int offset;
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	int len;
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	offset = fdt_path_offset(gd->fdt_blob, "/memory");
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	if (offset < 0)
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		return -EINVAL;
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	val = fdt_getprop(gd->fdt_blob, offset, "reg", &len);
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	if (len < sizeof(*val) * 2)
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		return -EINVAL;
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	/* Use unaligned access since cache is still disabled */
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	gd->ram_size = get_unaligned_be64(&val[1]);
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	return 0;
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}
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phys_size_t get_effective_memsize(void)
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{
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	/* Size is reported in MiB, convert it in bytes */
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	return ((readl(GX_AO_SEC_GP_CFG0) & GX_AO_MEM_SIZE_MASK)
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			>> GX_AO_MEM_SIZE_SHIFT) * SZ_1M;
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}
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static void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size)
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{
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	int ret;
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	ret = fdt_add_mem_rsv(fdt, start, size);
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	if (ret)
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		printf("Could not reserve zone @ 0x%llx\n", start);
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	if (IS_ENABLED(CONFIG_EFI_LOADER)) {
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		efi_add_memory_map(start,
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				   ALIGN(size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
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				   EFI_RESERVED_MEMORY_TYPE, false);
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	}
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}
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void meson_gx_init_reserved_memory(void *fdt)
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{
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	u64 bl31_size, bl31_start;
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	u64 bl32_size, bl32_start;
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	u32 reg;
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	/*
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	 * Get ARM Trusted Firmware reserved memory zones in :
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	 * - AO_SEC_GP_CFG3: bl32 & bl31 size in KiB, can be 0
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	 * - AO_SEC_GP_CFG5: bl31 physical start address, can be NULL
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	 * - AO_SEC_GP_CFG4: bl32 physical start address, can be NULL
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	 */
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	reg = readl(GX_AO_SEC_GP_CFG3);
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	bl31_size = ((reg & GX_AO_BL31_RSVMEM_SIZE_MASK)
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			>> GX_AO_BL31_RSVMEM_SIZE_SHIFT) * SZ_1K;
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	bl32_size = (reg & GX_AO_BL32_RSVMEM_SIZE_MASK) * SZ_1K;
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	bl31_start = readl(GX_AO_SEC_GP_CFG5);
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	bl32_start = readl(GX_AO_SEC_GP_CFG4);
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	/*
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	 * Early Meson GX Firmware revisions did not provide the reserved
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	 * memory zones in the registers, keep fixed memory zone handling.
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	 */
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	if (IS_ENABLED(CONFIG_MESON_GX) &&
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	    !reg && !bl31_start && !bl32_start) {
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		bl31_start = 0x10000000;
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		bl31_size = 0x200000;
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	}
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	/* Add first 16MiB reserved zone */
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	meson_board_add_reserved_memory(fdt, 0, GX_FIRMWARE_MEM_SIZE);
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	/* Add BL31 reserved zone */
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	if (bl31_start && bl31_size)
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		meson_board_add_reserved_memory(fdt, bl31_start, bl31_size);
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	/* Add BL32 reserved zone */
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	if (bl32_start && bl32_size)
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		meson_board_add_reserved_memory(fdt, bl32_start, bl32_size);
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}
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void reset_cpu(ulong addr)
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{
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	psci_system_reset();
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}
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static struct mm_region gx_mem_map[] = {
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	{
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		.virt = 0x0UL,
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		.phys = 0x0UL,
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		.size = 0x80000000UL,
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		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
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			 PTE_BLOCK_INNER_SHARE
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	}, {
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		.virt = 0x80000000UL,
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		.phys = 0x80000000UL,
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		.size = 0x80000000UL,
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		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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			 PTE_BLOCK_NON_SHARE |
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			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
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	}, {
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		/* List terminator */
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		0,
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	}
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};
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struct mm_region *mem_map = gx_mem_map;
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