Tom Warren d94c2dbd0a Tegra: Fix MSELECT clock divisors for T30/T114. ...

A comparison of registers between our internal NV U-Boot and
u-boot-tegra/next showed some discrepancies in the MSELECT
clock divisor programming. T20 doesn't have a MSELECT clk src reg.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>

2013-04-15 11:01:38 -07:00

..

config.mk

Tegra30: Add AVP (arm720t) files

2013-01-16 13:40:07 -07:00

cpu.c

Tegra: Fix MSELECT clock divisors for T30/T114.

2013-04-15 11:01:38 -07:00

Makefile

Tegra30: Add AVP (arm720t) files

2013-01-16 13:40:07 -07:00