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7cc079989d
u-boot/drivers/ddr
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York Sun 7cc079989d driver/ddr/fsl: Update workaround for A008511 for vref range 
The workaround requires different setting for range 1 vs 2.
Also adjust timeout value for waiting for controller to be idle.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:27 -08:00
..
altera ddr: altera: Repair uninited variable 2015-08-23 11:56:19 +02:00
fsl driver/ddr/fsl: Update workaround for A008511 for vref range 2015-12-13 18:27:27 -08:00
marvell arm: mvebu: Fix SAR1_CPU_CORE_MASK 2015-11-17 23:41:41 +01:00