Duncan Laurie b83058cd23 x86: Issue SMI to finalize Coreboot in final stage ...

This will write magic value to APMC command port which
will trigger an SMI and cause coreboot to lock down
the ME, chipset, and CPU.

Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>

2012-12-06 14:30:43 -08:00

..

asm-offsets.c

x86: Initial commit for running as a coreboot payload

2011-12-19 13:26:15 +11:00

config.mk

x86: coreboot: Set CONFIG_ARCH_DEVICE_TREE correctly

2012-12-06 14:30:42 -08:00

coreboot_car.S

x86: Initial commit for running as a coreboot payload

2011-12-19 13:26:15 +11:00

coreboot.c

x86: Issue SMI to finalize Coreboot in final stage

2012-12-06 14:30:43 -08:00

ipchecksum.c

x86: Import code from coreboot's libpayload to parse the coreboot table

2011-12-19 13:26:15 +11:00

Makefile

x86: Enable coreboot timestamp facility support in u-boot.

2012-12-06 14:30:38 -08:00

pci.c

x86: coreboot: Implement recursively scanning PCI busses

2012-11-28 11:40:05 -08:00

sdram.c

x86: Override calculate_relocation_address to use the e820 map

2012-12-06 14:30:42 -08:00

tables.c

x86: coreboot: Decode additional coreboot sysinfo tags

2012-11-30 13:44:03 -08:00

timestamp.c

x86: Enable coreboot timestamp facility support in u-boot.

2012-12-06 14:30:38 -08:00