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	The QorIQ LS1 family is built on Layerscape architecture, the industry's first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale. Freescale LS102xA is a set of SoCs combines two ARM Cortex-A7 cores that have been optimized for high reliability and pack the highest level of integration available for sub-3 W embedded communications processors with Layerscape architecture and with a comprehensive enablement model focused on ease of programmability. Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Jason Jin <jason.jin@freescale.com> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
		
			
				
	
	
		
			31 lines
		
	
	
		
			484 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			31 lines
		
	
	
		
			484 B
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright 2009 Freescale Semiconductor, Inc.
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #ifndef _ASM_CONFIG_H_
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| #define _ASM_CONFIG_H_
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| 
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| #ifdef __aarch64__
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| #define CONFIG_SYS_GENERIC_GLOBAL_DATA
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| #endif
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| 
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| #define CONFIG_LMB
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| #define CONFIG_SYS_BOOT_RAMDISK_HIGH
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| 
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| #ifdef CONFIG_ARM64
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| #define CONFIG_PHYS_64BIT
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| #define CONFIG_STATIC_RELA
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| #endif
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| 
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| #ifdef CONFIG_FSL_LSCH3
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| #include <asm/arch-fsl-lsch3/config.h>
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| #endif
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| 
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| #ifdef CONFIG_LS102XA
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| #include <asm/arch/config.h>
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| #endif
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| 
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| #endif
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