mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2025-10-26 22:11:49 +01:00
f105d2efcb
RISC-V U-Boot reimplements the generic io functions from asm-generic/io.h. Remove the redundant implementation and include the generic io.h instead. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
463 lines
12 KiB
C
463 lines
12 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2017 Andes Technology Corporation
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* Rick Chen, Andes Technology Corporation <rick@andestech.com>
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*
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*/
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#ifndef __ASM_RISCV_IO_H
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#define __ASM_RISCV_IO_H
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#ifdef __KERNEL__
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#include <linux/types.h>
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#include <asm/barrier.h>
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#include <asm/byteorder.h>
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static inline void sync(void)
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{
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}
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#ifdef CONFIG_ARCH_MAP_SYSMEM
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static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
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{
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if (paddr < PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE)
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paddr = paddr | 0x40000000;
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return (void *)(uintptr_t)paddr;
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}
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static inline void *unmap_sysmem(const void *vaddr)
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{
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phys_addr_t paddr = (phys_addr_t)vaddr;
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paddr = paddr & ~0x40000000;
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return (void *)(uintptr_t)paddr;
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}
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static inline phys_addr_t map_to_sysmem(const void *ptr)
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{
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return (phys_addr_t)(uintptr_t)ptr;
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}
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#endif
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/*
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* Generic virtual read/write. Note that we don't support half-word
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* read/writes. We define __arch_*[bl] here, and leave __arch_*w
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* to the architecture specific code.
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*/
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#define __arch_getb(a) (*(unsigned char *)(a))
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#define __arch_getw(a) (*(unsigned short *)(a))
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#define __arch_getl(a) (*(unsigned int *)(a))
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#define __arch_getq(a) (*(unsigned long long *)(a))
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#define __arch_putb(v, a) (*(unsigned char *)(a) = (v))
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#define __arch_putw(v, a) (*(unsigned short *)(a) = (v))
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#define __arch_putl(v, a) (*(unsigned int *)(a) = (v))
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#define __arch_putq(v, a) (*(unsigned long long *)(a) = (v))
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#define __raw_writeb(v, a) __arch_putb(v, a)
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#define __raw_writew(v, a) __arch_putw(v, a)
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#define __raw_writel(v, a) __arch_putl(v, a)
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#define __raw_writeq(v, a) __arch_putq(v, a)
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#define __raw_readb(a) __arch_getb(a)
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#define __raw_readw(a) __arch_getw(a)
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#define __raw_readl(a) __arch_getl(a)
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#define __raw_readq(a) __arch_getq(a)
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#define dmb() mb()
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#define __iormb() rmb()
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#define __iowmb() wmb()
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static inline void writeb(u8 val, volatile void __iomem *addr)
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{
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__iowmb();
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__arch_putb(val, addr);
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}
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static inline void writew(u16 val, volatile void __iomem *addr)
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{
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__iowmb();
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__arch_putw(val, addr);
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}
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static inline void writel(u32 val, volatile void __iomem *addr)
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{
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__iowmb();
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__arch_putl(val, addr);
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}
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static inline void writeq(u64 val, volatile void __iomem *addr)
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{
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__iowmb();
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__arch_putq(val, addr);
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}
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static inline u8 readb(const volatile void __iomem *addr)
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{
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u8 val;
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val = __arch_getb(addr);
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__iormb();
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return val;
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}
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static inline u16 readw(const volatile void __iomem *addr)
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{
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u16 val;
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val = __arch_getw(addr);
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__iormb();
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return val;
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}
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static inline u32 readl(const volatile void __iomem *addr)
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{
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u32 val;
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val = __arch_getl(addr);
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__iormb();
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return val;
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}
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static inline u64 readq(const volatile void __iomem *addr)
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{
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u64 val;
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val = __arch_getq(addr);
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__iormb();
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return val;
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}
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/*
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* The compiler seems to be incapable of optimising constants
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* properly. Spell it out to the compiler in some cases.
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* These are only valid for small values of "off" (< 1<<12)
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*/
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#define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off)
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#define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off)
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#define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off)
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#define __raw_base_readb(base, off) __arch_base_getb(base, off)
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#define __raw_base_readw(base, off) __arch_base_getw(base, off)
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#define __raw_base_readl(base, off) __arch_base_getl(base, off)
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#define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a)
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#define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a))
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#define out_le32(a, v) out_arch(l, le32, a, v)
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#define out_le16(a, v) out_arch(w, le16, a, v)
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#define in_le32(a) in_arch(l, le32, a)
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#define in_le16(a) in_arch(w, le16, a)
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#define out_be32(a, v) out_arch(l, be32, a, v)
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#define out_be16(a, v) out_arch(w, be16, a, v)
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#define in_be32(a) in_arch(l, be32, a)
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#define in_be16(a) in_arch(w, be16, a)
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#define out_8(a, v) __raw_writeb(v, a)
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#define in_8(a) __raw_readb(a)
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/*
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* Clear and set bits in one shot. These macros can be used to clear and
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* set multiple bits in a register using a single call. These macros can
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* also be used to set a multiple-bit bit pattern using a mask, by
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* specifying the mask in the 'clear' parameter and the new bit pattern
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* in the 'set' parameter.
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*/
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#define clrbits(type, addr, clear) \
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out_##type((addr), in_##type(addr) & ~(clear))
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#define setbits(type, addr, set) \
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out_##type((addr), in_##type(addr) | (set))
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#define clrsetbits(type, addr, clear, set) \
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out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
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#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
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#define setbits_be32(addr, set) setbits(be32, addr, set)
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#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
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#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
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#define setbits_le32(addr, set) setbits(le32, addr, set)
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#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
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#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
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#define setbits_be16(addr, set) setbits(be16, addr, set)
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#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
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#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
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#define setbits_le16(addr, set) setbits(le16, addr, set)
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#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
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#define clrbits_8(addr, clear) clrbits(8, addr, clear)
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#define setbits_8(addr, set) setbits(8, addr, set)
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#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
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/*
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* Now, pick up the machine-defined IO definitions
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* #include <asm/arch/io.h>
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*/
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/*
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* IO port access primitives
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* -------------------------
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*
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* The NDS32 doesn't have special IO access instructions just like ARM;
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* all IO is memory mapped.
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* Note that these are defined to perform little endian accesses
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* only. Their primary purpose is to access PCI and ISA peripherals.
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*
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* Note that for a big endian machine, this implies that the following
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* big endian mode connectivity is in place, as described by numerious
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* ARM documents:
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*
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* PCI: D0-D7 D8-D15 D16-D23 D24-D31
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* ARM: D24-D31 D16-D23 D8-D15 D0-D7
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*
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* The machine specific io.h include defines __io to translate an "IO"
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* address to a memory address.
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*
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* Note that we prevent GCC re-ordering or caching values in expressions
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* by introducing sequence points into the in*() definitions. Note that
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* __raw_* do not guarantee this behaviour.
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*
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* The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
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*/
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#ifdef __io
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#define outb(v, p) __raw_writeb(v, __io(p))
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#define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p))
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#define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p))
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#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
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#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
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#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
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#define outsb(p, d, l) writesb(__io(p), d, l)
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#define outsw(p, d, l) writesw(__io(p), d, l)
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#define outsl(p, d, l) writesl(__io(p), d, l)
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#define insb(p, d, l) readsb(__io(p), d, l)
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#define insw(p, d, l) readsw(__io(p), d, l)
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#define insl(p, d, l) readsl(__io(p), d, l)
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static inline void readsb(unsigned int *addr, void *data, int bytelen)
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{
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unsigned char *ptr;
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unsigned char *ptr2;
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ptr = (unsigned char *)addr;
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ptr2 = (unsigned char *)data;
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while (bytelen) {
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*ptr2 = *ptr;
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ptr2++;
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bytelen--;
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}
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}
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static inline void readsw(unsigned int *addr, void *data, int wordlen)
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{
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unsigned short *ptr;
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unsigned short *ptr2;
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ptr = (unsigned short *)addr;
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ptr2 = (unsigned short *)data;
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while (wordlen) {
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*ptr2 = *ptr;
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ptr2++;
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wordlen--;
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}
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}
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static inline void readsl(unsigned int *addr, void *data, int longlen)
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{
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unsigned int *ptr;
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unsigned int *ptr2;
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ptr = (unsigned int *)addr;
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ptr2 = (unsigned int *)data;
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while (longlen) {
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*ptr2 = *ptr;
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ptr2++;
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longlen--;
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}
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}
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static inline void writesb(unsigned int *addr, const void *data, int bytelen)
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{
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unsigned char *ptr;
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unsigned char *ptr2;
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ptr = (unsigned char *)addr;
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ptr2 = (unsigned char *)data;
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while (bytelen) {
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*ptr = *ptr2;
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ptr2++;
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bytelen--;
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}
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}
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static inline void writesw(unsigned int *addr, const void *data, int wordlen)
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{
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unsigned short *ptr;
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unsigned short *ptr2;
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ptr = (unsigned short *)addr;
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ptr2 = (unsigned short *)data;
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while (wordlen) {
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*ptr = *ptr2;
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ptr2++;
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wordlen--;
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}
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}
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static inline void writesl(unsigned int *addr, const void *data, int longlen)
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{
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unsigned int *ptr;
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unsigned int *ptr2;
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ptr = (unsigned int *)addr;
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ptr2 = (unsigned int *)data;
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while (longlen) {
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*ptr = *ptr2;
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ptr2++;
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longlen--;
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}
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}
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#endif
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#define outb_p(val, port) outb((val), (port))
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#define outw_p(val, port) outw((val), (port))
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#define outl_p(val, port) outl((val), (port))
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#define inb_p(port) inb((port))
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#define inw_p(port) inw((port))
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#define inl_p(port) inl((port))
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#define outsb_p(port, from, len) outsb(port, from, len)
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#define outsw_p(port, from, len) outsw(port, from, len)
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#define outsl_p(port, from, len) outsl(port, from, len)
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#define insb_p(port, to, len) insb(port, to, len)
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#define insw_p(port, to, len) insw(port, to, len)
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#define insl_p(port, to, len) insl(port, to, len)
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/*
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* DMA-consistent mapping functions. These allocate/free a region of
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* uncached, unwrite-buffered mapped memory space for use with DMA
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* devices. This is the "generic" version. The PCI specific version
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* is in pci.h
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*/
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/*
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* String version of IO memory access ops:
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*/
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/*
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* If this architecture has PCI memory IO, then define the read/write
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* macros. These should only be used with the cookie passed from
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* ioremap.
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*/
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#ifdef __mem_pci
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#define readb(c) ({ unsigned int __v = \
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__raw_readb(__mem_pci(c)); __v; })
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#define readw(c) ({ unsigned int __v = \
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le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
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#define readl(c) ({ unsigned int __v = \
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le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
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#define writeb(v, c) __raw_writeb(v, __mem_pci(c))
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#define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c))
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#define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c))
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#define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l))
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#define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l))
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#define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l))
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#define eth_io_copy_and_sum(s, c, l, b) \
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eth_copy_and_sum((s), __mem_pci(c), (l), (b))
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static inline int check_signature(ulong io_addr, const uchar *s, int len)
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{
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int retval = 0;
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do {
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if (readb(io_addr) != *s)
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goto out;
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io_addr++;
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s++;
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len--;
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} while (len);
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retval = 1;
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out:
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return retval;
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}
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#endif /* __mem_pci */
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/*
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* If this architecture has ISA IO, then define the isa_read/isa_write
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* macros.
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*/
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#ifdef __mem_isa
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#define isa_readb(addr) __raw_readb(__mem_isa(addr))
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#define isa_readw(addr) __raw_readw(__mem_isa(addr))
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#define isa_readl(addr) __raw_readl(__mem_isa(addr))
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#define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr))
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#define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr))
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#define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr))
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#define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c))
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#define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c))
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#define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c))
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#define isa_eth_io_copy_and_sum(a, b, c, d) \
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eth_copy_and_sum((a), __mem_isa(b), (c), (d))
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static inline int
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isa_check_signature(ulong io_addr, const uchar *s, int len)
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{
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int retval = 0;
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do {
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if (isa_readb(io_addr) != *s)
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goto out;
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io_addr++;
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s++;
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len--;
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} while (len);
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retval = 1;
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out:
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return retval;
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}
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#else /* __mem_isa */
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#define isa_readb(addr) (__readwrite_bug("isa_readb"), 0)
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#define isa_readw(addr) (__readwrite_bug("isa_readw"), 0)
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#define isa_readl(addr) (__readwrite_bug("isa_readl"), 0)
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#define isa_writeb(val, addr) __readwrite_bug("isa_writeb")
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#define isa_writew(val, addr) __readwrite_bug("isa_writew")
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#define isa_writel(val, addr) __readwrite_bug("isa_writel")
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#define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io")
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#define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio")
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#define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio")
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#define isa_eth_io_copy_and_sum(a, b, c, d) \
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__readwrite_bug("isa_eth_io_copy_and_sum")
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#define isa_check_signature(io, sig, len) (0)
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#endif /* __mem_isa */
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#endif /* __KERNEL__ */
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#include <asm-generic/io.h>
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#endif /* __ASM_RISCV_IO_H */
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