Ley Foon Tan 6cd7134e73 ddr: altera: Stratix10: Add multi-banks DRAM size check ...

Stratix 10 maps dram from 0 to 128GB.  There is a 2GB hole
in the memory for peripherals and other IO from 2GB to 4GB.
However the dram controller ignores upper address bits for
smaller dram configurations.  Example: a 4GB dram
maps to multiple locations, every 4GB on the address.

Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

2019-04-17 22:20:17 +02:00

..

altera

ddr: altera: Stratix10: Add multi-banks DRAM size check

2019-04-17 22:20:17 +02:00

fsl

configs: fsl: move DDR specific defines to Kconfig

2019-03-03 20:56:01 +05:30

imx

drivers: ddr: introduce DDR driver for i.MX8M

2019-01-01 14:12:18 +01:00

marvell

arm: mvebu: Add Marvell's integrated CPUs

2019-04-12 07:04:18 +02:00

microchip

SPDX: Convert all of our single license tags to Linux Kernel style

2018-05-07 09:34:12 -04:00

Kconfig

drivers: ddr: introduce DDR driver for i.MX8M

2019-01-01 14:12:18 +01:00