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1a4596601f
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
69 lines
1.2 KiB
C
69 lines
1.2 KiB
C
/*
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* Copyright (C) 2007,2008
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* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <ide.h>
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#include <netdev.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#include <asm/pci.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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puts("BOARD: Renesas Solutions R2D Plus\n");
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return 0;
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}
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int board_init(void)
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{
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return 0;
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}
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int dram_init(void)
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{
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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return 0;
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}
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int board_late_init(void)
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{
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return 0;
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}
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#define FPGA_BASE 0xA4000000
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#define FPGA_CFCTL (FPGA_BASE + 0x04)
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#define CFCTL_EN (0x432)
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#define FPGA_CFPOW (FPGA_BASE + 0x06)
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#define CFPOW_ON (0x02)
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#define FPGA_CFCDINTCLR (FPGA_BASE + 0x2A)
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#define CFCDINTCLR_EN (0x01)
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void ide_set_reset(int idereset)
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{
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/* if reset = 1 IDE reset will be asserted */
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if (idereset) {
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outw(CFCTL_EN, FPGA_CFCTL); /* CF enable */
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outw(inw(FPGA_CFPOW)|CFPOW_ON, FPGA_CFPOW); /* Power OM */
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outw(CFCDINTCLR_EN, FPGA_CFCDINTCLR); /* Int clear */
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}
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}
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static struct pci_controller hose;
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void pci_init_board(void)
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{
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pci_sh7751_init(&hose);
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}
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int board_eth_init(bd_t *bis)
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{
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return pci_eth_init(bis);
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}
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