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64fdf452a8
The patch add initial support for the Freescale i.MX51 processor (family arm cortex_a8). Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Fred Fan <fanyefeng@gmail.com>
120 lines
2.8 KiB
C
120 lines
2.8 KiB
C
/*
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* (C) Copyright 2007
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* Sascha Hauer, Pengutronix
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*
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* (C) Copyright 2009 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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/* General purpose timers registers */
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struct mxc_gpt {
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unsigned int control;
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unsigned int prescaler;
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unsigned int status;
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unsigned int nouse[6];
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unsigned int counter;
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};
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static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;
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/* General purpose timers bitfields */
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#define GPTCR_SWR (1<<15) /* Software reset */
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#define GPTCR_FRR (1<<9) /* Freerun / restart */
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#define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */
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#define GPTCR_TEN (1) /* Timer enable */
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static ulong timestamp;
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static ulong lastinc;
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int timer_init(void)
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{
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int i;
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/* setup GP Timer 1 */
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__raw_writel(GPTCR_SWR, &cur_gpt->control);
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/* We have no udelay by now */
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for (i = 0; i < 100; i++)
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__raw_writel(0, &cur_gpt->control);
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__raw_writel(0, &cur_gpt->prescaler); /* 32Khz */
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/* Freerun Mode, PERCLK1 input */
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i = __raw_readl(&cur_gpt->control);
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__raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
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reset_timer_masked();
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return 0;
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}
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void reset_timer(void)
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{
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reset_timer_masked();
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}
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void reset_timer_masked(void)
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{
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ulong val = __raw_readl(&cur_gpt->counter);
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lastinc = val / (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ);
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timestamp = 0;
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}
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ulong get_timer_masked(void)
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{
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ulong val = __raw_readl(&cur_gpt->counter);
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val /= (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ);
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if (val >= lastinc)
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timestamp += (val - lastinc);
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else
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timestamp += ((0xFFFFFFFF / (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ))
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- lastinc) + val;
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lastinc = val;
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return val;
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}
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ulong get_timer(ulong base)
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{
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return get_timer_masked() - base;
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}
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void set_timer(ulong t)
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{
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timestamp = t;
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}
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/* delay x useconds AND perserve advance timstamp value */
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void __udelay(unsigned long usec)
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{
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unsigned long now, start, tmo;
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tmo = usec * (CONFIG_MX51_CLK32 / 1000) / 1000;
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if (!tmo)
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tmo = 1;
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now = start = readl(&cur_gpt->counter);
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while ((now - start) < tmo)
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now = readl(&cur_gpt->counter);
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}
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