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0be402375d
Use content of EEPROM to detect the actual RAM size and adjust DDR timings, size and banks accordingly. Also enable the SoM detection per default in the defconfigs. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Tested-by: John Ma <jma@phytec.com>
45 lines
1.3 KiB
C
45 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2024 PHYTEC Messtechnik GmbH
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* Author: Daniel Schultz <d.schultz@phytec.de>
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*/
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#ifndef _PHYTEC_AM6_SOM_DETECTION_H
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#define _PHYTEC_AM6_SOM_DETECTION_H
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#include "phytec_som_detection.h"
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#define EEPROM_ADDR 0x50
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#define PHYTEC_AM62X_SOM 71
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#define PHYTEC_AM64X_SOM 72
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#define PHYTEC_EEPROM_VALUE_X 0x21
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#define PHYTEC_EEPROM_NOR_FLASH_64MB_QSPI 0xC
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enum {
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EEPROM_RAM_SIZE_512MB = 0,
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EEPROM_RAM_SIZE_1GB = 1,
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EEPROM_RAM_SIZE_2GB = 2,
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EEPROM_RAM_SIZE_4GB = 4
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};
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int __maybe_unused phytec_am6_detect(struct phytec_eeprom_data *data);
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u8 __maybe_unused phytec_get_am6_ddr_size(struct phytec_eeprom_data *data);
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u8 __maybe_unused phytec_get_am6_spi(struct phytec_eeprom_data *data);
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u8 __maybe_unused phytec_get_am6_eth(struct phytec_eeprom_data *data);
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u8 __maybe_unused phytec_get_am6_rtc(struct phytec_eeprom_data *data);
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static inline int phytec_am6_is_qspi(struct phytec_eeprom_data *data)
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{
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u8 spi = phytec_get_am6_spi(data);
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if (spi == PHYTEC_EEPROM_VALUE_X)
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return 0;
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return spi <= PHYTEC_EEPROM_NOR_FLASH_64MB_QSPI;
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}
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static inline int phytec_am6_is_ospi(struct phytec_eeprom_data *data)
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{
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return phytec_get_am6_spi(data) > PHYTEC_EEPROM_NOR_FLASH_64MB_QSPI;
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}
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#endif /* _PHYTEC_AM6_SOM_DETECTION_H */
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